Commit 95832c00 authored by John Youn's avatar John Youn Committed by Felipe Balbi

usb: dwc2: Fix usage of bool params

Check these parameters only for true or false. There is no need to check
for greater or less than 0.
Signed-off-by: default avatarJohn Youn <johnyoun@synopsys.com>
Signed-off-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
parent 7de1debc
...@@ -541,7 +541,7 @@ void dwc2_dump_host_registers(struct dwc2_hsotg *hsotg) ...@@ -541,7 +541,7 @@ void dwc2_dump_host_registers(struct dwc2_hsotg *hsotg)
addr = hsotg->regs + HAINTMSK; addr = hsotg->regs + HAINTMSK;
dev_dbg(hsotg->dev, "HAINTMSK @0x%08lX : 0x%08X\n", dev_dbg(hsotg->dev, "HAINTMSK @0x%08lX : 0x%08X\n",
(unsigned long)addr, dwc2_readl(addr)); (unsigned long)addr, dwc2_readl(addr));
if (hsotg->params.dma_desc_enable > 0) { if (hsotg->params.dma_desc_enable) {
addr = hsotg->regs + HFLBADDR; addr = hsotg->regs + HFLBADDR;
dev_dbg(hsotg->dev, "HFLBADDR @0x%08lX : 0x%08X\n", dev_dbg(hsotg->dev, "HFLBADDR @0x%08lX : 0x%08X\n",
(unsigned long)addr, dwc2_readl(addr)); (unsigned long)addr, dwc2_readl(addr));
...@@ -571,7 +571,7 @@ void dwc2_dump_host_registers(struct dwc2_hsotg *hsotg) ...@@ -571,7 +571,7 @@ void dwc2_dump_host_registers(struct dwc2_hsotg *hsotg)
addr = hsotg->regs + HCDMA(i); addr = hsotg->regs + HCDMA(i);
dev_dbg(hsotg->dev, "HCDMA @0x%08lX : 0x%08X\n", dev_dbg(hsotg->dev, "HCDMA @0x%08lX : 0x%08X\n",
(unsigned long)addr, dwc2_readl(addr)); (unsigned long)addr, dwc2_readl(addr));
if (hsotg->params.dma_desc_enable > 0) { if (hsotg->params.dma_desc_enable) {
addr = hsotg->regs + HCDMAB(i); addr = hsotg->regs + HCDMAB(i);
dev_dbg(hsotg->dev, "HCDMAB @0x%08lX : 0x%08X\n", dev_dbg(hsotg->dev, "HCDMAB @0x%08lX : 0x%08X\n",
(unsigned long)addr, dwc2_readl(addr)); (unsigned long)addr, dwc2_readl(addr));
......
...@@ -470,9 +470,6 @@ struct dwc2_core_params { ...@@ -470,9 +470,6 @@ struct dwc2_core_params {
u8 phy_utmi_width; u8 phy_utmi_width;
bool phy_ulpi_ddr; bool phy_ulpi_ddr;
bool phy_ulpi_ext_vbus; bool phy_ulpi_ext_vbus;
#define DWC2_PHY_ULPI_INTERNAL_VBUS 0
#define DWC2_PHY_ULPI_EXTERNAL_VBUS 1
bool enable_dynamic_fifo; bool enable_dynamic_fifo;
bool en_multiple_tx_fifo; bool en_multiple_tx_fifo;
bool i2c_enable; bool i2c_enable;
...@@ -492,8 +489,6 @@ struct dwc2_core_params { ...@@ -492,8 +489,6 @@ struct dwc2_core_params {
bool dma_desc_fs_enable; bool dma_desc_fs_enable;
bool host_support_fs_ls_low_power; bool host_support_fs_ls_low_power;
bool host_ls_low_power_phy_clk; bool host_ls_low_power_phy_clk;
#define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ 0
#define DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ 1
u8 host_channels; u8 host_channels;
u16 host_rx_fifo_size; u16 host_rx_fifo_size;
......
...@@ -160,7 +160,7 @@ static void dwc2_handle_otg_intr(struct dwc2_hsotg *hsotg) ...@@ -160,7 +160,7 @@ static void dwc2_handle_otg_intr(struct dwc2_hsotg *hsotg)
gotgctl = dwc2_readl(hsotg->regs + GOTGCTL); gotgctl = dwc2_readl(hsotg->regs + GOTGCTL);
if (gotgctl & GOTGCTL_SESREQSCS) { if (gotgctl & GOTGCTL_SESREQSCS) {
if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS && if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS &&
hsotg->params.i2c_enable > 0) { hsotg->params.i2c_enable) {
hsotg->srp_success = 1; hsotg->srp_success = 1;
} else { } else {
/* Clear Session Request */ /* Clear Session Request */
......
...@@ -3227,7 +3227,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg, ...@@ -3227,7 +3227,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
if (!using_desc_dma(hsotg)) if (!using_desc_dma(hsotg))
intmsk |= GINTSTS_INCOMPL_SOIN | GINTSTS_INCOMPL_SOOUT; intmsk |= GINTSTS_INCOMPL_SOIN | GINTSTS_INCOMPL_SOOUT;
if (hsotg->params.external_id_pin_ctl <= 0) if (!hsotg->params.external_id_pin_ctl)
intmsk |= GINTSTS_CONIDSTSCHNG; intmsk |= GINTSTS_CONIDSTSCHNG;
dwc2_writel(intmsk, hsotg->regs + GINTMSK); dwc2_writel(intmsk, hsotg->regs + GINTMSK);
......
This diff is collapsed.
...@@ -296,7 +296,7 @@ static void dwc2_release_channel_ddma(struct dwc2_hsotg *hsotg, ...@@ -296,7 +296,7 @@ static void dwc2_release_channel_ddma(struct dwc2_hsotg *hsotg,
struct dwc2_host_chan *chan = qh->channel; struct dwc2_host_chan *chan = qh->channel;
if (dwc2_qh_is_non_per(qh)) { if (dwc2_qh_is_non_per(qh)) {
if (hsotg->params.uframe_sched > 0) if (hsotg->params.uframe_sched)
hsotg->available_host_channels++; hsotg->available_host_channels++;
else else
hsotg->non_periodic_channels--; hsotg->non_periodic_channels--;
...@@ -403,7 +403,7 @@ void dwc2_hcd_qh_free_ddma(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) ...@@ -403,7 +403,7 @@ void dwc2_hcd_qh_free_ddma(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
if ((qh->ep_type == USB_ENDPOINT_XFER_ISOC || if ((qh->ep_type == USB_ENDPOINT_XFER_ISOC ||
qh->ep_type == USB_ENDPOINT_XFER_INT) && qh->ep_type == USB_ENDPOINT_XFER_INT) &&
(hsotg->params.uframe_sched > 0 || (hsotg->params.uframe_sched ||
!hsotg->periodic_channels) && hsotg->frame_list) { !hsotg->periodic_channels) && hsotg->frame_list) {
dwc2_per_sched_disable(hsotg); dwc2_per_sched_disable(hsotg);
dwc2_frame_list_free(hsotg); dwc2_frame_list_free(hsotg);
......
...@@ -297,8 +297,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0, ...@@ -297,8 +297,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0,
HCFG_FSLSPCLKSEL_SHIFT; HCFG_FSLSPCLKSEL_SHIFT;
if (prtspd == HPRT0_SPD_LOW_SPEED && if (prtspd == HPRT0_SPD_LOW_SPEED &&
params->host_ls_low_power_phy_clk == params->host_ls_low_power_phy_clk) {
DWC2_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ) {
/* 6 MHZ */ /* 6 MHZ */
dev_vdbg(hsotg->dev, dev_vdbg(hsotg->dev,
"FS_PHY programming HCFG to 6 MHz\n"); "FS_PHY programming HCFG to 6 MHz\n");
...@@ -398,7 +397,7 @@ static void dwc2_port_intr(struct dwc2_hsotg *hsotg) ...@@ -398,7 +397,7 @@ static void dwc2_port_intr(struct dwc2_hsotg *hsotg)
if (hsotg->params.dma_desc_fs_enable) { if (hsotg->params.dma_desc_fs_enable) {
u32 hcfg; u32 hcfg;
hsotg->params.dma_desc_enable = 0; hsotg->params.dma_desc_enable = false;
hsotg->new_connection = false; hsotg->new_connection = false;
hcfg = dwc2_readl(hsotg->regs + HCFG); hcfg = dwc2_readl(hsotg->regs + HCFG);
hcfg &= ~HCFG_DESCDMA; hcfg &= ~HCFG_DESCDMA;
...@@ -604,7 +603,7 @@ static enum dwc2_halt_status dwc2_update_isoc_urb_state( ...@@ -604,7 +603,7 @@ static enum dwc2_halt_status dwc2_update_isoc_urb_state(
/* Skip whole frame */ /* Skip whole frame */
if (chan->qh->do_split && if (chan->qh->do_split &&
chan->ep_type == USB_ENDPOINT_XFER_ISOC && chan->ep_is_in && chan->ep_type == USB_ENDPOINT_XFER_ISOC && chan->ep_is_in &&
hsotg->params.host_dma > 0) { hsotg->params.host_dma) {
qtd->complete_split = 0; qtd->complete_split = 0;
qtd->isoc_split_offset = 0; qtd->isoc_split_offset = 0;
} }
...@@ -743,7 +742,7 @@ static void dwc2_release_channel(struct dwc2_hsotg *hsotg, ...@@ -743,7 +742,7 @@ static void dwc2_release_channel(struct dwc2_hsotg *hsotg,
dwc2_hc_cleanup(hsotg, chan); dwc2_hc_cleanup(hsotg, chan);
list_add_tail(&chan->hc_list_entry, &hsotg->free_hc_list); list_add_tail(&chan->hc_list_entry, &hsotg->free_hc_list);
if (hsotg->params.uframe_sched > 0) { if (hsotg->params.uframe_sched) {
hsotg->available_host_channels++; hsotg->available_host_channels++;
} else { } else {
switch (chan->ep_type) { switch (chan->ep_type) {
...@@ -789,7 +788,7 @@ static void dwc2_halt_channel(struct dwc2_hsotg *hsotg, ...@@ -789,7 +788,7 @@ static void dwc2_halt_channel(struct dwc2_hsotg *hsotg,
if (dbg_hc(chan)) if (dbg_hc(chan))
dev_vdbg(hsotg->dev, "%s()\n", __func__); dev_vdbg(hsotg->dev, "%s()\n", __func__);
if (hsotg->params.host_dma > 0) { if (hsotg->params.host_dma) {
if (dbg_hc(chan)) if (dbg_hc(chan))
dev_vdbg(hsotg->dev, "DMA enabled\n"); dev_vdbg(hsotg->dev, "DMA enabled\n");
dwc2_release_channel(hsotg, chan, qtd, halt_status); dwc2_release_channel(hsotg, chan, qtd, halt_status);
...@@ -979,7 +978,7 @@ static void dwc2_hc_xfercomp_intr(struct dwc2_hsotg *hsotg, ...@@ -979,7 +978,7 @@ static void dwc2_hc_xfercomp_intr(struct dwc2_hsotg *hsotg,
pipe_type = dwc2_hcd_get_pipe_type(&urb->pipe_info); pipe_type = dwc2_hcd_get_pipe_type(&urb->pipe_info);
if (hsotg->params.dma_desc_enable > 0) { if (hsotg->params.dma_desc_enable) {
dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, halt_status); dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, halt_status);
if (pipe_type == USB_ENDPOINT_XFER_ISOC) if (pipe_type == USB_ENDPOINT_XFER_ISOC)
/* Do not disable the interrupt, just clear it */ /* Do not disable the interrupt, just clear it */
...@@ -990,7 +989,7 @@ static void dwc2_hc_xfercomp_intr(struct dwc2_hsotg *hsotg, ...@@ -990,7 +989,7 @@ static void dwc2_hc_xfercomp_intr(struct dwc2_hsotg *hsotg,
/* Handle xfer complete on CSPLIT */ /* Handle xfer complete on CSPLIT */
if (chan->qh->do_split) { if (chan->qh->do_split) {
if (chan->ep_type == USB_ENDPOINT_XFER_ISOC && chan->ep_is_in && if (chan->ep_type == USB_ENDPOINT_XFER_ISOC && chan->ep_is_in &&
hsotg->params.host_dma > 0) { hsotg->params.host_dma) {
if (qtd->complete_split && if (qtd->complete_split &&
dwc2_xfercomp_isoc_split_in(hsotg, chan, chnum, dwc2_xfercomp_isoc_split_in(hsotg, chan, chnum,
qtd)) qtd))
...@@ -1103,7 +1102,7 @@ static void dwc2_hc_stall_intr(struct dwc2_hsotg *hsotg, ...@@ -1103,7 +1102,7 @@ static void dwc2_hc_stall_intr(struct dwc2_hsotg *hsotg,
dev_dbg(hsotg->dev, "--Host Channel %d Interrupt: STALL Received--\n", dev_dbg(hsotg->dev, "--Host Channel %d Interrupt: STALL Received--\n",
chnum); chnum);
if (hsotg->params.dma_desc_enable > 0) { if (hsotg->params.dma_desc_enable) {
dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum,
DWC2_HC_XFER_STALL); DWC2_HC_XFER_STALL);
goto handle_stall_done; goto handle_stall_done;
...@@ -1213,7 +1212,7 @@ static void dwc2_hc_nak_intr(struct dwc2_hsotg *hsotg, ...@@ -1213,7 +1212,7 @@ static void dwc2_hc_nak_intr(struct dwc2_hsotg *hsotg,
switch (dwc2_hcd_get_pipe_type(&qtd->urb->pipe_info)) { switch (dwc2_hcd_get_pipe_type(&qtd->urb->pipe_info)) {
case USB_ENDPOINT_XFER_CONTROL: case USB_ENDPOINT_XFER_CONTROL:
case USB_ENDPOINT_XFER_BULK: case USB_ENDPOINT_XFER_BULK:
if (hsotg->params.host_dma > 0 && chan->ep_is_in) { if (hsotg->params.host_dma && chan->ep_is_in) {
/* /*
* NAK interrupts are enabled on bulk/control IN * NAK interrupts are enabled on bulk/control IN
* transfers in DMA mode for the sole purpose of * transfers in DMA mode for the sole purpose of
...@@ -1359,7 +1358,7 @@ static void dwc2_hc_nyet_intr(struct dwc2_hsotg *hsotg, ...@@ -1359,7 +1358,7 @@ static void dwc2_hc_nyet_intr(struct dwc2_hsotg *hsotg,
*/ */
if (chan->do_split && chan->complete_split) { if (chan->do_split && chan->complete_split) {
if (chan->ep_is_in && chan->ep_type == USB_ENDPOINT_XFER_ISOC && if (chan->ep_is_in && chan->ep_type == USB_ENDPOINT_XFER_ISOC &&
hsotg->params.host_dma > 0) { hsotg->params.host_dma) {
qtd->complete_split = 0; qtd->complete_split = 0;
qtd->isoc_split_offset = 0; qtd->isoc_split_offset = 0;
qtd->isoc_frame_index++; qtd->isoc_frame_index++;
...@@ -1380,7 +1379,7 @@ static void dwc2_hc_nyet_intr(struct dwc2_hsotg *hsotg, ...@@ -1380,7 +1379,7 @@ static void dwc2_hc_nyet_intr(struct dwc2_hsotg *hsotg,
struct dwc2_qh *qh = chan->qh; struct dwc2_qh *qh = chan->qh;
bool past_end; bool past_end;
if (hsotg->params.uframe_sched <= 0) { if (!hsotg->params.uframe_sched) {
int frnum = dwc2_hcd_get_frame_number(hsotg); int frnum = dwc2_hcd_get_frame_number(hsotg);
/* Don't have num_hs_transfers; simple logic */ /* Don't have num_hs_transfers; simple logic */
...@@ -1478,7 +1477,7 @@ static void dwc2_hc_babble_intr(struct dwc2_hsotg *hsotg, ...@@ -1478,7 +1477,7 @@ static void dwc2_hc_babble_intr(struct dwc2_hsotg *hsotg,
dwc2_hc_handle_tt_clear(hsotg, chan, qtd); dwc2_hc_handle_tt_clear(hsotg, chan, qtd);
if (hsotg->params.dma_desc_enable > 0) { if (hsotg->params.dma_desc_enable) {
dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum,
DWC2_HC_XFER_BABBLE_ERR); DWC2_HC_XFER_BABBLE_ERR);
goto disable_int; goto disable_int;
...@@ -1583,7 +1582,7 @@ static void dwc2_hc_ahberr_intr(struct dwc2_hsotg *hsotg, ...@@ -1583,7 +1582,7 @@ static void dwc2_hc_ahberr_intr(struct dwc2_hsotg *hsotg,
dev_err(hsotg->dev, " Interval: %d\n", urb->interval); dev_err(hsotg->dev, " Interval: %d\n", urb->interval);
/* Core halts the channel for Descriptor DMA mode */ /* Core halts the channel for Descriptor DMA mode */
if (hsotg->params.dma_desc_enable > 0) { if (hsotg->params.dma_desc_enable) {
dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum,
DWC2_HC_XFER_AHB_ERR); DWC2_HC_XFER_AHB_ERR);
goto handle_ahberr_done; goto handle_ahberr_done;
...@@ -1615,7 +1614,7 @@ static void dwc2_hc_xacterr_intr(struct dwc2_hsotg *hsotg, ...@@ -1615,7 +1614,7 @@ static void dwc2_hc_xacterr_intr(struct dwc2_hsotg *hsotg,
dwc2_hc_handle_tt_clear(hsotg, chan, qtd); dwc2_hc_handle_tt_clear(hsotg, chan, qtd);
if (hsotg->params.dma_desc_enable > 0) { if (hsotg->params.dma_desc_enable) {
dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum,
DWC2_HC_XFER_XACT_ERR); DWC2_HC_XFER_XACT_ERR);
goto handle_xacterr_done; goto handle_xacterr_done;
...@@ -1808,8 +1807,8 @@ static void dwc2_hc_chhltd_intr_dma(struct dwc2_hsotg *hsotg, ...@@ -1808,8 +1807,8 @@ static void dwc2_hc_chhltd_intr_dma(struct dwc2_hsotg *hsotg,
if (chan->halt_status == DWC2_HC_XFER_URB_DEQUEUE || if (chan->halt_status == DWC2_HC_XFER_URB_DEQUEUE ||
(chan->halt_status == DWC2_HC_XFER_AHB_ERR && (chan->halt_status == DWC2_HC_XFER_AHB_ERR &&
hsotg->params.dma_desc_enable <= 0)) { !hsotg->params.dma_desc_enable)) {
if (hsotg->params.dma_desc_enable > 0) if (hsotg->params.dma_desc_enable)
dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum,
chan->halt_status); chan->halt_status);
else else
...@@ -1840,7 +1839,7 @@ static void dwc2_hc_chhltd_intr_dma(struct dwc2_hsotg *hsotg, ...@@ -1840,7 +1839,7 @@ static void dwc2_hc_chhltd_intr_dma(struct dwc2_hsotg *hsotg,
} else if (chan->hcint & HCINTMSK_STALL) { } else if (chan->hcint & HCINTMSK_STALL) {
dwc2_hc_stall_intr(hsotg, chan, chnum, qtd); dwc2_hc_stall_intr(hsotg, chan, chnum, qtd);
} else if ((chan->hcint & HCINTMSK_XACTERR) && } else if ((chan->hcint & HCINTMSK_XACTERR) &&
hsotg->params.dma_desc_enable <= 0) { !hsotg->params.dma_desc_enable) {
if (out_nak_enh) { if (out_nak_enh) {
if (chan->hcint & if (chan->hcint &
(HCINTMSK_NYET | HCINTMSK_NAK | HCINTMSK_ACK)) { (HCINTMSK_NYET | HCINTMSK_NAK | HCINTMSK_ACK)) {
...@@ -1860,10 +1859,10 @@ static void dwc2_hc_chhltd_intr_dma(struct dwc2_hsotg *hsotg, ...@@ -1860,10 +1859,10 @@ static void dwc2_hc_chhltd_intr_dma(struct dwc2_hsotg *hsotg,
*/ */
dwc2_hc_xacterr_intr(hsotg, chan, chnum, qtd); dwc2_hc_xacterr_intr(hsotg, chan, chnum, qtd);
} else if ((chan->hcint & HCINTMSK_XCS_XACT) && } else if ((chan->hcint & HCINTMSK_XCS_XACT) &&
hsotg->params.dma_desc_enable > 0) { hsotg->params.dma_desc_enable) {
dwc2_hc_xacterr_intr(hsotg, chan, chnum, qtd); dwc2_hc_xacterr_intr(hsotg, chan, chnum, qtd);
} else if ((chan->hcint & HCINTMSK_AHBERR) && } else if ((chan->hcint & HCINTMSK_AHBERR) &&
hsotg->params.dma_desc_enable > 0) { hsotg->params.dma_desc_enable) {
dwc2_hc_ahberr_intr(hsotg, chan, chnum, qtd); dwc2_hc_ahberr_intr(hsotg, chan, chnum, qtd);
} else if (chan->hcint & HCINTMSK_BBLERR) { } else if (chan->hcint & HCINTMSK_BBLERR) {
dwc2_hc_babble_intr(hsotg, chan, chnum, qtd); dwc2_hc_babble_intr(hsotg, chan, chnum, qtd);
...@@ -1956,7 +1955,7 @@ static void dwc2_hc_chhltd_intr(struct dwc2_hsotg *hsotg, ...@@ -1956,7 +1955,7 @@ static void dwc2_hc_chhltd_intr(struct dwc2_hsotg *hsotg,
dev_vdbg(hsotg->dev, "--Host Channel %d Interrupt: Channel Halted--\n", dev_vdbg(hsotg->dev, "--Host Channel %d Interrupt: Channel Halted--\n",
chnum); chnum);
if (hsotg->params.host_dma > 0) { if (hsotg->params.host_dma) {
dwc2_hc_chhltd_intr_dma(hsotg, chan, chnum, qtd); dwc2_hc_chhltd_intr_dma(hsotg, chan, chnum, qtd);
} else { } else {
if (!dwc2_halt_status_ok(hsotg, chan, chnum, qtd)) if (!dwc2_halt_status_ok(hsotg, chan, chnum, qtd))
...@@ -2033,7 +2032,7 @@ static void dwc2_hc_n_intr(struct dwc2_hsotg *hsotg, int chnum) ...@@ -2033,7 +2032,7 @@ static void dwc2_hc_n_intr(struct dwc2_hsotg *hsotg, int chnum)
* interrupt unmasked * interrupt unmasked
*/ */
WARN_ON(hcint != HCINTMSK_CHHLTD); WARN_ON(hcint != HCINTMSK_CHHLTD);
if (hsotg->params.dma_desc_enable > 0) if (hsotg->params.dma_desc_enable)
dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum,
chan->halt_status); chan->halt_status);
else else
...@@ -2061,7 +2060,7 @@ static void dwc2_hc_n_intr(struct dwc2_hsotg *hsotg, int chnum) ...@@ -2061,7 +2060,7 @@ static void dwc2_hc_n_intr(struct dwc2_hsotg *hsotg, int chnum)
qtd = list_first_entry(&chan->qh->qtd_list, struct dwc2_qtd, qtd = list_first_entry(&chan->qh->qtd_list, struct dwc2_qtd,
qtd_list_entry); qtd_list_entry);
if (hsotg->params.host_dma <= 0) { if (!hsotg->params.host_dma) {
if ((hcint & HCINTMSK_CHHLTD) && hcint != HCINTMSK_CHHLTD) if ((hcint & HCINTMSK_CHHLTD) && hcint != HCINTMSK_CHHLTD)
hcint &= ~HCINTMSK_CHHLTD; hcint &= ~HCINTMSK_CHHLTD;
} }
......
...@@ -1104,7 +1104,7 @@ static void dwc2_pick_first_frame(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) ...@@ -1104,7 +1104,7 @@ static void dwc2_pick_first_frame(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
next_active_frame = earliest_frame; next_active_frame = earliest_frame;
/* Get the "no microframe schduler" out of the way... */ /* Get the "no microframe schduler" out of the way... */
if (hsotg->params.uframe_sched <= 0) { if (!hsotg->params.uframe_sched) {
if (qh->do_split) if (qh->do_split)
/* Splits are active at microframe 0 minus 1 */ /* Splits are active at microframe 0 minus 1 */
next_active_frame |= 0x7; next_active_frame |= 0x7;
...@@ -1197,7 +1197,7 @@ static int dwc2_do_reserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) ...@@ -1197,7 +1197,7 @@ static int dwc2_do_reserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
{ {
int status; int status;
if (hsotg->params.uframe_sched > 0) { if (hsotg->params.uframe_sched) {
status = dwc2_uframe_schedule(hsotg, qh); status = dwc2_uframe_schedule(hsotg, qh);
} else { } else {
status = dwc2_periodic_channel_available(hsotg); status = dwc2_periodic_channel_available(hsotg);
...@@ -1218,7 +1218,7 @@ static int dwc2_do_reserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) ...@@ -1218,7 +1218,7 @@ static int dwc2_do_reserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
return status; return status;
} }
if (hsotg->params.uframe_sched <= 0) if (!hsotg->params.uframe_sched)
/* Reserve periodic channel */ /* Reserve periodic channel */
hsotg->periodic_channels++; hsotg->periodic_channels++;
...@@ -1254,7 +1254,7 @@ static void dwc2_do_unreserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) ...@@ -1254,7 +1254,7 @@ static void dwc2_do_unreserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
/* Update claimed usecs per (micro)frame */ /* Update claimed usecs per (micro)frame */
hsotg->periodic_usecs -= qh->host_us; hsotg->periodic_usecs -= qh->host_us;
if (hsotg->params.uframe_sched > 0) { if (hsotg->params.uframe_sched) {
dwc2_uframe_unschedule(hsotg, qh); dwc2_uframe_unschedule(hsotg, qh);
} else { } else {
/* Release periodic channel reservation */ /* Release periodic channel reservation */
...@@ -1391,7 +1391,7 @@ static int dwc2_schedule_periodic(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) ...@@ -1391,7 +1391,7 @@ static int dwc2_schedule_periodic(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
qh->unreserve_pending = 0; qh->unreserve_pending = 0;
if (hsotg->params.dma_desc_enable > 0) if (hsotg->params.dma_desc_enable)
/* Don't rely on SOF and start in ready schedule */ /* Don't rely on SOF and start in ready schedule */
list_add_tail(&qh->qh_list_entry, &hsotg->periodic_sched_ready); list_add_tail(&qh->qh_list_entry, &hsotg->periodic_sched_ready);
else else
...@@ -1598,7 +1598,7 @@ struct dwc2_qh *dwc2_hcd_qh_create(struct dwc2_hsotg *hsotg, ...@@ -1598,7 +1598,7 @@ struct dwc2_qh *dwc2_hcd_qh_create(struct dwc2_hsotg *hsotg,
dwc2_qh_init(hsotg, qh, urb, mem_flags); dwc2_qh_init(hsotg, qh, urb, mem_flags);
if (hsotg->params.dma_desc_enable > 0 && if (hsotg->params.dma_desc_enable &&
dwc2_hcd_qh_init_ddma(hsotg, qh, mem_flags) < 0) { dwc2_hcd_qh_init_ddma(hsotg, qh, mem_flags) < 0) {
dwc2_hcd_qh_free(hsotg, qh); dwc2_hcd_qh_free(hsotg, qh);
return NULL; return NULL;
...@@ -1710,7 +1710,7 @@ void dwc2_hcd_qh_unlink(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) ...@@ -1710,7 +1710,7 @@ void dwc2_hcd_qh_unlink(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
dwc2_deschedule_periodic(hsotg, qh); dwc2_deschedule_periodic(hsotg, qh);
hsotg->periodic_qh_count--; hsotg->periodic_qh_count--;
if (!hsotg->periodic_qh_count && if (!hsotg->periodic_qh_count &&
hsotg->params.dma_desc_enable <= 0) { !hsotg->params.dma_desc_enable) {
intr_mask = dwc2_readl(hsotg->regs + GINTMSK); intr_mask = dwc2_readl(hsotg->regs + GINTMSK);
intr_mask &= ~GINTSTS_SOF; intr_mask &= ~GINTSTS_SOF;
dwc2_writel(intr_mask, hsotg->regs + GINTMSK); dwc2_writel(intr_mask, hsotg->regs + GINTMSK);
......
...@@ -53,7 +53,7 @@ static void dwc2_set_bcm_params(struct dwc2_hsotg *hsotg) ...@@ -53,7 +53,7 @@ static void dwc2_set_bcm_params(struct dwc2_hsotg *hsotg)
p->phy_type = 1; p->phy_type = 1;
p->phy_utmi_width = 8; p->phy_utmi_width = 8;
p->i2c_enable = false; p->i2c_enable = false;
p->host_ls_low_power_phy_clk = 0; p->host_ls_low_power_phy_clk = false;
p->reload_ctl = false; p->reload_ctl = false;
p->ahbcfg = 0x10; p->ahbcfg = 0x10;
p->uframe_sched = false; p->uframe_sched = false;
...@@ -74,7 +74,7 @@ static void dwc2_set_his_params(struct dwc2_hsotg *hsotg) ...@@ -74,7 +74,7 @@ static void dwc2_set_his_params(struct dwc2_hsotg *hsotg)
p->phy_type = DWC2_PHY_TYPE_PARAM_UTMI; p->phy_type = DWC2_PHY_TYPE_PARAM_UTMI;
p->phy_utmi_width = 8; p->phy_utmi_width = 8;
p->i2c_enable = false; p->i2c_enable = false;
p->host_ls_low_power_phy_clk = 0; p->host_ls_low_power_phy_clk = false;
p->reload_ctl = false; p->reload_ctl = false;
p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
GAHBCFG_HBSTLEN_SHIFT; GAHBCFG_HBSTLEN_SHIFT;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment