Commit 959b86ae authored by Rajan Vaja's avatar Rajan Vaja Committed by Michal Simek

arm64: dts: xilinx: Add the power nodes for zynqmp

Add power domain nodes for zynqmp.
Signed-off-by: default avatarRajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
parent 44064868
......@@ -12,6 +12,8 @@
* the License, or (at your option) any later version.
*/
#include <dt-bindings/power/xlnx-zynqmp-power.h>
/ {
compatible = "xlnx,zynqmp";
#address-cells = <2>;
......@@ -118,8 +120,15 @@ psci {
firmware {
zynqmp_firmware: zynqmp-firmware {
compatible = "xlnx,zynqmp-firmware";
#power-domain-cells = <1>;
method = "smc";
zynqmp_power: zynqmp-power {
compatible = "xlnx,zynqmp-power";
interrupt-parent = <&gic>;
interrupts = <0 35 4>;
};
zynqmp_clk: clock-controller {
u-boot,dm-pre-reloc;
#clock-cells = <1>;
......@@ -203,6 +212,7 @@ can0: can@ff060000 {
interrupt-parent = <&gic>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
power-domains = <&zynqmp_firmware PD_CAN_0>;
};
can1: can@ff070000 {
......@@ -214,6 +224,7 @@ can1: can@ff070000 {
interrupt-parent = <&gic>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
power-domains = <&zynqmp_firmware PD_CAN_1>;
};
cci: cci@fd6e0000 {
......@@ -244,6 +255,7 @@ fpd_dma_chan1: dma@fd500000 {
interrupts = <0 124 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
power-domains = <&zynqmp_firmware PD_GDMA>;
};
fpd_dma_chan2: dma@fd510000 {
......@@ -254,6 +266,7 @@ fpd_dma_chan2: dma@fd510000 {
interrupts = <0 125 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
power-domains = <&zynqmp_firmware PD_GDMA>;
};
fpd_dma_chan3: dma@fd520000 {
......@@ -264,6 +277,7 @@ fpd_dma_chan3: dma@fd520000 {
interrupts = <0 126 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
power-domains = <&zynqmp_firmware PD_GDMA>;
};
fpd_dma_chan4: dma@fd530000 {
......@@ -274,6 +288,7 @@ fpd_dma_chan4: dma@fd530000 {
interrupts = <0 127 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
power-domains = <&zynqmp_firmware PD_GDMA>;
};
fpd_dma_chan5: dma@fd540000 {
......@@ -284,6 +299,7 @@ fpd_dma_chan5: dma@fd540000 {
interrupts = <0 128 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
power-domains = <&zynqmp_firmware PD_GDMA>;
};
fpd_dma_chan6: dma@fd550000 {
......@@ -294,6 +310,7 @@ fpd_dma_chan6: dma@fd550000 {
interrupts = <0 129 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
power-domains = <&zynqmp_firmware PD_GDMA>;
};
fpd_dma_chan7: dma@fd560000 {
......@@ -304,6 +321,7 @@ fpd_dma_chan7: dma@fd560000 {
interrupts = <0 130 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
power-domains = <&zynqmp_firmware PD_GDMA>;
};
fpd_dma_chan8: dma@fd570000 {
......@@ -314,6 +332,7 @@ fpd_dma_chan8: dma@fd570000 {
interrupts = <0 131 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
power-domains = <&zynqmp_firmware PD_GDMA>;
};
/* LPDDMA default allows only secured access. inorder to enable
......@@ -328,6 +347,7 @@ lpd_dma_chan1: dma@ffa80000 {
interrupts = <0 77 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
power-domains = <&zynqmp_firmware PD_ADMA>;
};
lpd_dma_chan2: dma@ffa90000 {
......@@ -338,6 +358,7 @@ lpd_dma_chan2: dma@ffa90000 {
interrupts = <0 78 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
power-domains = <&zynqmp_firmware PD_ADMA>;
};
lpd_dma_chan3: dma@ffaa0000 {
......@@ -348,6 +369,7 @@ lpd_dma_chan3: dma@ffaa0000 {
interrupts = <0 79 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
power-domains = <&zynqmp_firmware PD_ADMA>;
};
lpd_dma_chan4: dma@ffab0000 {
......@@ -358,6 +380,7 @@ lpd_dma_chan4: dma@ffab0000 {
interrupts = <0 80 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
power-domains = <&zynqmp_firmware PD_ADMA>;
};
lpd_dma_chan5: dma@ffac0000 {
......@@ -368,6 +391,7 @@ lpd_dma_chan5: dma@ffac0000 {
interrupts = <0 81 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
power-domains = <&zynqmp_firmware PD_ADMA>;
};
lpd_dma_chan6: dma@ffad0000 {
......@@ -378,6 +402,7 @@ lpd_dma_chan6: dma@ffad0000 {
interrupts = <0 82 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
power-domains = <&zynqmp_firmware PD_ADMA>;
};
lpd_dma_chan7: dma@ffae0000 {
......@@ -388,6 +413,7 @@ lpd_dma_chan7: dma@ffae0000 {
interrupts = <0 83 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
power-domains = <&zynqmp_firmware PD_ADMA>;
};
lpd_dma_chan8: dma@ffaf0000 {
......@@ -398,6 +424,7 @@ lpd_dma_chan8: dma@ffaf0000 {
interrupts = <0 84 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
power-domains = <&zynqmp_firmware PD_ADMA>;
};
mc: memory-controller@fd070000 {
......@@ -416,6 +443,7 @@ gem0: ethernet@ff0b0000 {
clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&zynqmp_firmware PD_ETH_0>;
};
gem1: ethernet@ff0c0000 {
......@@ -427,6 +455,7 @@ gem1: ethernet@ff0c0000 {
clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&zynqmp_firmware PD_ETH_1>;
};
gem2: ethernet@ff0d0000 {
......@@ -438,6 +467,7 @@ gem2: ethernet@ff0d0000 {
clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&zynqmp_firmware PD_ETH_2>;
};
gem3: ethernet@ff0e0000 {
......@@ -449,6 +479,7 @@ gem3: ethernet@ff0e0000 {
clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&zynqmp_firmware PD_ETH_3>;
};
gpio: gpio@ff0a0000 {
......@@ -461,6 +492,7 @@ gpio: gpio@ff0a0000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x0 0xff0a0000 0x0 0x1000>;
power-domains = <&zynqmp_firmware PD_GPIO>;
};
i2c0: i2c@ff020000 {
......@@ -471,6 +503,7 @@ i2c0: i2c@ff020000 {
reg = <0x0 0xff020000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&zynqmp_firmware PD_I2C_0>;
};
i2c1: i2c@ff030000 {
......@@ -481,6 +514,7 @@ i2c1: i2c@ff030000 {
reg = <0x0 0xff030000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&zynqmp_firmware PD_I2C_1>;
};
pcie: pcie@fd0e0000 {
......@@ -512,6 +546,7 @@ pcie: pcie@fd0e0000 {
<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
<0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
<0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
power-domains = <&zynqmp_firmware PD_PCIE>;
pcie_intc: legacy-interrupt-controller {
interrupt-controller;
#address-cells = <0>;
......@@ -535,6 +570,7 @@ sata: ahci@fd0c0000 {
reg = <0x0 0xfd0c0000 0x0 0x2000>;
interrupt-parent = <&gic>;
interrupts = <0 133 4>;
power-domains = <&zynqmp_firmware PD_SATA>;
};
sdhci0: mmc@ff160000 {
......@@ -546,6 +582,7 @@ sdhci0: mmc@ff160000 {
clock-names = "clk_xin", "clk_ahb";
#clock-cells = <1>;
clock-output-names = "clk_out_sd0", "clk_in_sd0";
power-domains = <&zynqmp_firmware PD_SD_0>;
};
sdhci1: mmc@ff170000 {
......@@ -557,6 +594,7 @@ sdhci1: mmc@ff170000 {
clock-names = "clk_xin", "clk_ahb";
#clock-cells = <1>;
clock-output-names = "clk_out_sd1", "clk_in_sd1";
power-domains = <&zynqmp_firmware PD_SD_1>;
};
smmu: smmu@fd800000 {
......@@ -581,6 +619,7 @@ spi0: spi@ff040000 {
clock-names = "ref_clk", "pclk";
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&zynqmp_firmware PD_SPI_0>;
};
spi1: spi@ff050000 {
......@@ -592,6 +631,7 @@ spi1: spi@ff050000 {
clock-names = "ref_clk", "pclk";
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&zynqmp_firmware PD_SPI_1>;
};
ttc0: timer@ff110000 {
......@@ -601,6 +641,7 @@ ttc0: timer@ff110000 {
interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&zynqmp_firmware PD_TTC_0>;
};
ttc1: timer@ff120000 {
......@@ -610,6 +651,7 @@ ttc1: timer@ff120000 {
interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
reg = <0x0 0xff120000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&zynqmp_firmware PD_TTC_1>;
};
ttc2: timer@ff130000 {
......@@ -619,6 +661,7 @@ ttc2: timer@ff130000 {
interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
reg = <0x0 0xff130000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&zynqmp_firmware PD_TTC_2>;
};
ttc3: timer@ff140000 {
......@@ -628,6 +671,7 @@ ttc3: timer@ff140000 {
interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
reg = <0x0 0xff140000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&zynqmp_firmware PD_TTC_3>;
};
uart0: serial@ff000000 {
......@@ -637,6 +681,7 @@ uart0: serial@ff000000 {
interrupts = <0 21 4>;
reg = <0x0 0xff000000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
power-domains = <&zynqmp_firmware PD_UART_0>;
};
uart1: serial@ff010000 {
......@@ -646,6 +691,7 @@ uart1: serial@ff010000 {
interrupts = <0 22 4>;
reg = <0x0 0xff010000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
power-domains = <&zynqmp_firmware PD_UART_1>;
};
usb0: usb@fe200000 {
......@@ -655,6 +701,7 @@ usb0: usb@fe200000 {
interrupts = <0 65 4>;
reg = <0x0 0xfe200000 0x0 0x40000>;
clock-names = "clk_xin", "clk_ahb";
power-domains = <&zynqmp_firmware PD_USB_0>;
};
usb1: usb@fe300000 {
......@@ -664,6 +711,7 @@ usb1: usb@fe300000 {
interrupts = <0 70 4>;
reg = <0x0 0xfe300000 0x0 0x40000>;
clock-names = "clk_xin", "clk_ahb";
power-domains = <&zynqmp_firmware PD_USB_1>;
};
watchdog0: watchdog@fd4d0000 {
......
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