ARM: at91: make dma register base soc independant

Signed-off-by: default avatarJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
parent d28edd1b
...@@ -44,8 +44,8 @@ static struct at_dma_platform_data atdma_pdata = { ...@@ -44,8 +44,8 @@ static struct at_dma_platform_data atdma_pdata = {
static struct resource hdmac_resources[] = { static struct resource hdmac_resources[] = {
[0] = { [0] = {
.start = AT91_BASE_SYS + AT91_DMA, .start = AT91SAM9G45_BASE_DMA,
.end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1, .end = AT91SAM9G45_BASE_DMA + SZ_512 - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
......
...@@ -39,8 +39,8 @@ static struct at_dma_platform_data atdma_pdata = { ...@@ -39,8 +39,8 @@ static struct at_dma_platform_data atdma_pdata = {
static struct resource hdmac_resources[] = { static struct resource hdmac_resources[] = {
[0] = { [0] = {
.start = AT91_BASE_SYS + AT91_DMA, .start = AT91SAM9RL_BASE_DMA,
.end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1, .end = AT91SAM9RL_BASE_DMA + SZ_512 - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[2] = { [2] = {
......
...@@ -84,7 +84,6 @@ ...@@ -84,7 +84,6 @@
#define AT91_SMC (0xffffe800 - AT91_BASE_SYS) #define AT91_SMC (0xffffe800 - AT91_BASE_SYS)
#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) #define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS)
#define AT91_CCFG (0xffffeb10 - AT91_BASE_SYS) #define AT91_CCFG (0xffffeb10 - AT91_BASE_SYS)
#define AT91_DMA (0xffffec00 - AT91_BASE_SYS)
#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) #define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) #define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
...@@ -98,6 +97,7 @@ ...@@ -98,6 +97,7 @@
(0xfffffd60 - AT91_BASE_SYS)) (0xfffffd60 - AT91_BASE_SYS))
#define AT91CAP9_BASE_ECC 0xffffe200 #define AT91CAP9_BASE_ECC 0xffffe200
#define AT91CAP9_BASE_DMA 0xffffec00
#define AT91CAP9_BASE_PIOA 0xfffff200 #define AT91CAP9_BASE_PIOA 0xfffff200
#define AT91CAP9_BASE_PIOB 0xfffff400 #define AT91CAP9_BASE_PIOB 0xfffff400
#define AT91CAP9_BASE_PIOC 0xfffff600 #define AT91CAP9_BASE_PIOC 0xfffff600
......
...@@ -90,7 +90,6 @@ ...@@ -90,7 +90,6 @@
#define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) #define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS)
#define AT91_SMC (0xffffe800 - AT91_BASE_SYS) #define AT91_SMC (0xffffe800 - AT91_BASE_SYS)
#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) #define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS)
#define AT91_DMA (0xffffec00 - AT91_BASE_SYS)
#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) #define AT91_DBGU (0xffffee00 - AT91_BASE_SYS)
#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) #define AT91_AIC (0xfffff000 - AT91_BASE_SYS)
#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS)
...@@ -103,6 +102,7 @@ ...@@ -103,6 +102,7 @@
#define AT91_RTC (0xfffffdb0 - AT91_BASE_SYS) #define AT91_RTC (0xfffffdb0 - AT91_BASE_SYS)
#define AT91SAM9G45_BASE_ECC 0xffffe200 #define AT91SAM9G45_BASE_ECC 0xffffe200
#define AT91SAM9G45_BASE_DMA 0xffffec00
#define AT91SAM9G45_BASE_PIOA 0xfffff200 #define AT91SAM9G45_BASE_PIOA 0xfffff200
#define AT91SAM9G45_BASE_PIOB 0xfffff400 #define AT91SAM9G45_BASE_PIOB 0xfffff400
#define AT91SAM9G45_BASE_PIOC 0xfffff600 #define AT91SAM9G45_BASE_PIOC 0xfffff600
......
...@@ -69,7 +69,6 @@ ...@@ -69,7 +69,6 @@
/* /*
* System Peripherals (offset from AT91_BASE_SYS) * System Peripherals (offset from AT91_BASE_SYS)
*/ */
#define AT91_DMA (0xffffe600 - AT91_BASE_SYS)
#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS)
#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) #define AT91_SMC (0xffffec00 - AT91_BASE_SYS)
#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS)
...@@ -86,6 +85,7 @@ ...@@ -86,6 +85,7 @@
#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) #define AT91_RTC (0xfffffe00 - AT91_BASE_SYS)
#define AT91SAM9RL_BASE_DMA 0xffffe600
#define AT91SAM9RL_BASE_ECC 0xffffe800 #define AT91SAM9RL_BASE_ECC 0xffffe800
#define AT91SAM9RL_BASE_PIOA 0xfffff400 #define AT91SAM9RL_BASE_PIOA 0xfffff400
#define AT91SAM9RL_BASE_PIOB 0xfffff600 #define AT91SAM9RL_BASE_PIOB 0xfffff600
......
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