Commit 96310fd8 authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Mauro Carvalho Chehab

media: atomisp: make platform data more readable

Add few blank lines to make platform data more readable.
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 250977de
...@@ -284,6 +284,7 @@ static struct gmin_cfg_var mrd7_vars[] = { ...@@ -284,6 +284,7 @@ static struct gmin_cfg_var mrd7_vars[] = {
{"INT33F8:00_CsiFmt", "13"}, {"INT33F8:00_CsiFmt", "13"},
{"INT33F8:00_CsiBayer", "0"}, {"INT33F8:00_CsiBayer", "0"},
{"INT33F8:00_CamClk", "0"}, {"INT33F8:00_CamClk", "0"},
{"INT33F9:00_CamType", "1"}, {"INT33F9:00_CamType", "1"},
{"INT33F9:00_CsiPort", "0"}, {"INT33F9:00_CsiPort", "0"},
{"INT33F9:00_CsiLanes", "1"}, {"INT33F9:00_CsiLanes", "1"},
...@@ -299,6 +300,7 @@ static struct gmin_cfg_var ecs7_vars[] = { ...@@ -299,6 +300,7 @@ static struct gmin_cfg_var ecs7_vars[] = {
{"INT33BE:00_CsiFmt", "13"}, {"INT33BE:00_CsiFmt", "13"},
{"INT33BE:00_CsiBayer", "2"}, {"INT33BE:00_CsiBayer", "2"},
{"INT33BE:00_CamClk", "0"}, {"INT33BE:00_CamClk", "0"},
{"INT33F0:00_CsiPort", "0"}, {"INT33F0:00_CsiPort", "0"},
{"INT33F0:00_CsiLanes", "1"}, {"INT33F0:00_CsiLanes", "1"},
{"INT33F0:00_CsiFmt", "13"}, {"INT33F0:00_CsiFmt", "13"},
...@@ -312,6 +314,7 @@ static struct gmin_cfg_var i8880_vars[] = { ...@@ -312,6 +314,7 @@ static struct gmin_cfg_var i8880_vars[] = {
{"XXOV2680:00_CsiPort", "1"}, {"XXOV2680:00_CsiPort", "1"},
{"XXOV2680:00_CsiLanes", "1"}, {"XXOV2680:00_CsiLanes", "1"},
{"XXOV2680:00_CamClk", "0"}, {"XXOV2680:00_CamClk", "0"},
{"XXGC0310:00_CsiPort", "0"}, {"XXGC0310:00_CsiPort", "0"},
{"XXGC0310:00_CsiLanes", "1"}, {"XXGC0310:00_CsiLanes", "1"},
{"XXGC0310:00_CamClk", "1"}, {"XXGC0310:00_CamClk", "1"},
......
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