Commit 970cdc53 authored by Elaine Zhang's avatar Elaine Zhang Committed by Heiko Stuebner

ARM: dts: rockchip: Fix power-controller node names for rk3288

Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: default avatarElaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: default avatarEnric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: default avatarJohan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210417112952.8516-4-jbx6244@gmail.comSigned-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent d3bcbcd3
...@@ -765,7 +765,7 @@ power: power-controller { ...@@ -765,7 +765,7 @@ power: power-controller {
* *_HDMI HDMI * *_HDMI HDMI
* *_MIPI_* MIPI * *_MIPI_* MIPI
*/ */
pd_vio@RK3288_PD_VIO { power-domain@RK3288_PD_VIO {
reg = <RK3288_PD_VIO>; reg = <RK3288_PD_VIO>;
clocks = <&cru ACLK_IEP>, clocks = <&cru ACLK_IEP>,
<&cru ACLK_ISP>, <&cru ACLK_ISP>,
...@@ -807,7 +807,7 @@ pd_vio@RK3288_PD_VIO { ...@@ -807,7 +807,7 @@ pd_vio@RK3288_PD_VIO {
* Note: The following 3 are HEVC(H.265) clocks, * Note: The following 3 are HEVC(H.265) clocks,
* and on the ACLK_HEVC_NIU (NOC). * and on the ACLK_HEVC_NIU (NOC).
*/ */
pd_hevc@RK3288_PD_HEVC { power-domain@RK3288_PD_HEVC {
reg = <RK3288_PD_HEVC>; reg = <RK3288_PD_HEVC>;
clocks = <&cru ACLK_HEVC>, clocks = <&cru ACLK_HEVC>,
<&cru SCLK_HEVC_CABAC>, <&cru SCLK_HEVC_CABAC>,
...@@ -821,7 +821,7 @@ pd_hevc@RK3288_PD_HEVC { ...@@ -821,7 +821,7 @@ pd_hevc@RK3288_PD_HEVC {
* (video endecoder & decoder) clocks that on the * (video endecoder & decoder) clocks that on the
* ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC). * ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC).
*/ */
pd_video@RK3288_PD_VIDEO { power-domain@RK3288_PD_VIDEO {
reg = <RK3288_PD_VIDEO>; reg = <RK3288_PD_VIDEO>;
clocks = <&cru ACLK_VCODEC>, clocks = <&cru ACLK_VCODEC>,
<&cru HCLK_VCODEC>; <&cru HCLK_VCODEC>;
...@@ -832,7 +832,7 @@ pd_video@RK3288_PD_VIDEO { ...@@ -832,7 +832,7 @@ pd_video@RK3288_PD_VIDEO {
* Note: ACLK_GPU is the GPU clock, * Note: ACLK_GPU is the GPU clock,
* and on the ACLK_GPU_NIU (NOC). * and on the ACLK_GPU_NIU (NOC).
*/ */
pd_gpu@RK3288_PD_GPU { power-domain@RK3288_PD_GPU {
reg = <RK3288_PD_GPU>; reg = <RK3288_PD_GPU>;
clocks = <&cru ACLK_GPU>; clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu_r>, pm_qos = <&qos_gpu_r>,
......
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