Commit 9898a593 authored by Biwen Li's avatar Biwen Li Committed by Marc Zyngier

dt-bindings: interrupt-controller: update bindings for supporting more SoCs

Update bindings for Layerscape external irqs,
support more SoCs(LS1043A, LS1046A, LS1088A,
LS208xA, LX216xA)
Signed-off-by: default avatarBiwen Li <biwen.li@nxp.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Acked-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201130101515.27431-11-biwen.li@oss.nxp.com
parent b16a1caf
* Freescale Layerscape external IRQs * Freescale Layerscape external IRQs
Some Layerscape SOCs (LS1021A, LS1043A, LS1046A) support inverting Some Layerscape SOCs (LS1021A, LS1043A, LS1046A
LS1088A, LS208xA, LX216xA) support inverting
the polarity of certain external interrupt lines. the polarity of certain external interrupt lines.
The device node must be a child of the node representing the The device node must be a child of the node representing the
...@@ -8,12 +9,15 @@ Supplemental Configuration Unit (SCFG). ...@@ -8,12 +9,15 @@ Supplemental Configuration Unit (SCFG).
Required properties: Required properties:
- compatible: should be "fsl,<soc-name>-extirq", e.g. "fsl,ls1021a-extirq". - compatible: should be "fsl,<soc-name>-extirq", e.g. "fsl,ls1021a-extirq".
"fsl,ls1043a-extirq": for LS1043A, LS1046A.
"fsl,ls1088a-extirq": for LS1088A, LS208xA, LX216xA.
- #interrupt-cells: Must be 2. The first element is the index of the - #interrupt-cells: Must be 2. The first element is the index of the
external interrupt line. The second element is the trigger type. external interrupt line. The second element is the trigger type.
- #address-cells: Must be 0. - #address-cells: Must be 0.
- interrupt-controller: Identifies the node as an interrupt controller - interrupt-controller: Identifies the node as an interrupt controller
- reg: Specifies the Interrupt Polarity Control Register (INTPCR) in - reg: Specifies the Interrupt Polarity Control Register (INTPCR) in
the SCFG. the SCFG or the External Interrupt Control Register (IRQCR) in
the ISC.
- interrupt-map: Specifies the mapping from external interrupts to GIC - interrupt-map: Specifies the mapping from external interrupts to GIC
interrupts. interrupts.
- interrupt-map-mask: Must be <0xffffffff 0>. - interrupt-map-mask: Must be <0xffffffff 0>.
......
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