Commit 98b1bb9e authored by Mark Brown's avatar Mark Brown

ASoC: SOF: imx: stop using the imx8_*_clocks API

Merge series from Laurentiu Mihalcea <laurentiumihalcea111@gmail.com>:

The imx8_*_clocks API requires keeping track of all of the clocks used
by the IMX SOF driver via an array. This is unnecessary and doesn't
scale well. As such, remove it altogether and replace it with
devm_clk_bulk_get_all() and friends.
parents 9f1aeef4 e618b8b3
......@@ -74,28 +74,4 @@ void imx8_dump(struct snd_sof_dev *sdev, u32 flags)
}
EXPORT_SYMBOL(imx8_dump);
int imx8_parse_clocks(struct snd_sof_dev *sdev, struct imx_clocks *clks)
{
int ret;
ret = devm_clk_bulk_get(sdev->dev, clks->num_dsp_clks, clks->dsp_clks);
if (ret)
dev_err(sdev->dev, "Failed to request DSP clocks\n");
return ret;
}
EXPORT_SYMBOL(imx8_parse_clocks);
int imx8_enable_clocks(struct snd_sof_dev *sdev, struct imx_clocks *clks)
{
return clk_bulk_prepare_enable(clks->num_dsp_clks, clks->dsp_clks);
}
EXPORT_SYMBOL(imx8_enable_clocks);
void imx8_disable_clocks(struct snd_sof_dev *sdev, struct imx_clocks *clks)
{
clk_bulk_disable_unprepare(clks->num_dsp_clks, clks->dsp_clks);
}
EXPORT_SYMBOL(imx8_disable_clocks);
MODULE_LICENSE("Dual BSD/GPL");
......@@ -15,13 +15,4 @@ void imx8_get_registers(struct snd_sof_dev *sdev,
void imx8_dump(struct snd_sof_dev *sdev, u32 flags);
struct imx_clocks {
struct clk_bulk_data *dsp_clks;
int num_dsp_clks;
};
int imx8_parse_clocks(struct snd_sof_dev *sdev, struct imx_clocks *clks);
int imx8_enable_clocks(struct snd_sof_dev *sdev, struct imx_clocks *clks);
void imx8_disable_clocks(struct snd_sof_dev *sdev, struct imx_clocks *clks);
#endif
......@@ -41,13 +41,6 @@
#define MBOX_OFFSET 0x800000
#define MBOX_SIZE 0x1000
/* DSP clocks */
static struct clk_bulk_data imx8_dsp_clks[] = {
{ .id = "ipg" },
{ .id = "ocram" },
{ .id = "core" },
};
struct imx8_priv {
struct device *dev;
struct snd_sof_dev *sdev;
......@@ -64,7 +57,8 @@ struct imx8_priv {
struct device **pd_dev;
struct device_link **link;
struct imx_clocks *clks;
struct clk_bulk_data *clks;
int clk_num;
};
static int imx8_get_mailbox_offset(struct snd_sof_dev *sdev)
......@@ -196,10 +190,6 @@ static int imx8_probe(struct snd_sof_dev *sdev)
if (!priv)
return -ENOMEM;
priv->clks = devm_kzalloc(&pdev->dev, sizeof(*priv->clks), GFP_KERNEL);
if (!priv->clks)
return -ENOMEM;
sdev->num_cores = 1;
sdev->pdata->hw_pdata = priv;
priv->dev = sdev->dev;
......@@ -313,17 +303,18 @@ static int imx8_probe(struct snd_sof_dev *sdev)
/* set default mailbox offset for FW ready message */
sdev->dsp_box.offset = MBOX_OFFSET;
/* init clocks info */
priv->clks->dsp_clks = imx8_dsp_clks;
priv->clks->num_dsp_clks = ARRAY_SIZE(imx8_dsp_clks);
ret = imx8_parse_clocks(sdev, priv->clks);
if (ret < 0)
ret = devm_clk_bulk_get_all(sdev->dev, &priv->clks);
if (ret < 0) {
dev_err(sdev->dev, "failed to fetch clocks: %d\n", ret);
goto exit_pdev_unregister;
}
priv->clk_num = ret;
ret = imx8_enable_clocks(sdev, priv->clks);
if (ret < 0)
ret = clk_bulk_prepare_enable(priv->clk_num, priv->clks);
if (ret < 0) {
dev_err(sdev->dev, "failed to enable clocks: %d\n", ret);
goto exit_pdev_unregister;
}
return 0;
......@@ -343,7 +334,7 @@ static void imx8_remove(struct snd_sof_dev *sdev)
struct imx8_priv *priv = sdev->pdata->hw_pdata;
int i;
imx8_disable_clocks(sdev, priv->clks);
clk_bulk_disable_unprepare(priv->clk_num, priv->clks);
platform_device_unregister(priv->ipc_dev);
for (i = 0; i < priv->num_domains; i++) {
......@@ -373,7 +364,7 @@ static void imx8_suspend(struct snd_sof_dev *sdev)
for (i = 0; i < DSP_MU_CHAN_NUM; i++)
imx_dsp_free_channel(priv->dsp_ipc, i);
imx8_disable_clocks(sdev, priv->clks);
clk_bulk_disable_unprepare(priv->clk_num, priv->clks);
}
static int imx8_resume(struct snd_sof_dev *sdev)
......@@ -382,9 +373,11 @@ static int imx8_resume(struct snd_sof_dev *sdev)
int ret;
int i;
ret = imx8_enable_clocks(sdev, priv->clks);
if (ret < 0)
ret = clk_bulk_prepare_enable(priv->clk_num, priv->clks);
if (ret < 0) {
dev_err(sdev->dev, "failed to enable clocks: %d\n", ret);
return ret;
}
for (i = 0; i < DSP_MU_CHAN_NUM; i++)
imx_dsp_request_channel(priv->dsp_ipc, i);
......
......@@ -26,12 +26,6 @@
#define MBOX_OFFSET 0x800000
#define MBOX_SIZE 0x1000
static struct clk_bulk_data imx8m_dsp_clks[] = {
{ .id = "ipg" },
{ .id = "ocram" },
{ .id = "core" },
};
/* DAP registers */
#define IMX8M_DAP_DEBUG 0x28800000
#define IMX8M_DAP_DEBUG_SIZE (64 * 1024)
......@@ -54,7 +48,8 @@ struct imx8m_priv {
struct imx_dsp_ipc *dsp_ipc;
struct platform_device *ipc_dev;
struct imx_clocks *clks;
struct clk_bulk_data *clks;
int clk_num;
void __iomem *dap;
struct regmap *regmap;
......@@ -163,10 +158,6 @@ static int imx8m_probe(struct snd_sof_dev *sdev)
if (!priv)
return -ENOMEM;
priv->clks = devm_kzalloc(&pdev->dev, sizeof(*priv->clks), GFP_KERNEL);
if (!priv->clks)
return -ENOMEM;
sdev->num_cores = 1;
sdev->pdata->hw_pdata = priv;
priv->dev = sdev->dev;
......@@ -250,17 +241,18 @@ static int imx8m_probe(struct snd_sof_dev *sdev)
goto exit_pdev_unregister;
}
/* init clocks info */
priv->clks->dsp_clks = imx8m_dsp_clks;
priv->clks->num_dsp_clks = ARRAY_SIZE(imx8m_dsp_clks);
ret = imx8_parse_clocks(sdev, priv->clks);
if (ret < 0)
ret = devm_clk_bulk_get_all(sdev->dev, &priv->clks);
if (ret < 0) {
dev_err(sdev->dev, "failed to fetch clocks: %d\n", ret);
goto exit_pdev_unregister;
}
priv->clk_num = ret;
ret = imx8_enable_clocks(sdev, priv->clks);
if (ret < 0)
ret = clk_bulk_prepare_enable(priv->clk_num, priv->clks);
if (ret < 0) {
dev_err(sdev->dev, "failed to enable clocks: %d\n", ret);
goto exit_pdev_unregister;
}
return 0;
......@@ -273,7 +265,7 @@ static void imx8m_remove(struct snd_sof_dev *sdev)
{
struct imx8m_priv *priv = sdev->pdata->hw_pdata;
imx8_disable_clocks(sdev, priv->clks);
clk_bulk_disable_unprepare(priv->clk_num, priv->clks);
platform_device_unregister(priv->ipc_dev);
}
......@@ -336,9 +328,11 @@ static int imx8m_resume(struct snd_sof_dev *sdev)
int ret;
int i;
ret = imx8_enable_clocks(sdev, priv->clks);
if (ret < 0)
ret = clk_bulk_prepare_enable(priv->clk_num, priv->clks);
if (ret < 0) {
dev_err(sdev->dev, "failed to enable clocks: %d\n", ret);
return ret;
}
for (i = 0; i < DSP_MU_CHAN_NUM; i++)
imx_dsp_request_channel(priv->dsp_ipc, i);
......@@ -354,7 +348,7 @@ static void imx8m_suspend(struct snd_sof_dev *sdev)
for (i = 0; i < DSP_MU_CHAN_NUM; i++)
imx_dsp_free_channel(priv->dsp_ipc, i);
imx8_disable_clocks(sdev, priv->clks);
clk_bulk_disable_unprepare(priv->clk_num, priv->clks);
}
static int imx8m_dsp_runtime_resume(struct snd_sof_dev *sdev)
......
......@@ -40,13 +40,6 @@
#define MBOX_OFFSET 0x800000
#define MBOX_SIZE 0x1000
static struct clk_bulk_data imx8ulp_dsp_clks[] = {
{ .id = "core" },
{ .id = "ipg" },
{ .id = "ocram" },
{ .id = "mu" },
};
struct imx8ulp_priv {
struct device *dev;
struct snd_sof_dev *sdev;
......@@ -56,7 +49,8 @@ struct imx8ulp_priv {
struct platform_device *ipc_dev;
struct regmap *regmap;
struct imx_clocks *clks;
struct clk_bulk_data *clks;
int clk_num;
};
static void imx8ulp_sim_lpav_start(struct imx8ulp_priv *priv)
......@@ -175,10 +169,6 @@ static int imx8ulp_probe(struct snd_sof_dev *sdev)
if (!priv)
return -ENOMEM;
priv->clks = devm_kzalloc(&pdev->dev, sizeof(*priv->clks), GFP_KERNEL);
if (!priv->clks)
return -ENOMEM;
sdev->num_cores = 1;
sdev->pdata->hw_pdata = priv;
priv->dev = sdev->dev;
......@@ -259,16 +249,18 @@ static int imx8ulp_probe(struct snd_sof_dev *sdev)
goto exit_pdev_unregister;
}
priv->clks->dsp_clks = imx8ulp_dsp_clks;
priv->clks->num_dsp_clks = ARRAY_SIZE(imx8ulp_dsp_clks);
ret = imx8_parse_clocks(sdev, priv->clks);
if (ret < 0)
ret = devm_clk_bulk_get_all(sdev->dev, &priv->clks);
if (ret < 0) {
dev_err(sdev->dev, "failed to fetch clocks: %d\n", ret);
goto exit_pdev_unregister;
}
priv->clk_num = ret;
ret = imx8_enable_clocks(sdev, priv->clks);
if (ret < 0)
ret = clk_bulk_prepare_enable(priv->clk_num, priv->clks);
if (ret < 0) {
dev_err(sdev->dev, "failed to enable clocks: %d\n", ret);
goto exit_pdev_unregister;
}
return 0;
......@@ -282,7 +274,7 @@ static void imx8ulp_remove(struct snd_sof_dev *sdev)
{
struct imx8ulp_priv *priv = sdev->pdata->hw_pdata;
imx8_disable_clocks(sdev, priv->clks);
clk_bulk_disable_unprepare(priv->clk_num, priv->clks);
platform_device_unregister(priv->ipc_dev);
}
......@@ -303,7 +295,7 @@ static int imx8ulp_suspend(struct snd_sof_dev *sdev)
for (i = 0; i < DSP_MU_CHAN_NUM; i++)
imx_dsp_free_channel(priv->dsp_ipc, i);
imx8_disable_clocks(sdev, priv->clks);
clk_bulk_disable_unprepare(priv->clk_num, priv->clks);
return 0;
}
......@@ -311,9 +303,13 @@ static int imx8ulp_suspend(struct snd_sof_dev *sdev)
static int imx8ulp_resume(struct snd_sof_dev *sdev)
{
struct imx8ulp_priv *priv = (struct imx8ulp_priv *)sdev->pdata->hw_pdata;
int i;
int i, ret;
imx8_enable_clocks(sdev, priv->clks);
ret = clk_bulk_prepare_enable(priv->clk_num, priv->clks);
if (ret < 0) {
dev_err(sdev->dev, "failed to enable clocks: %d\n", ret);
return ret;
}
for (i = 0; i < DSP_MU_CHAN_NUM; i++)
imx_dsp_request_channel(priv->dsp_ipc, i);
......
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