Commit 98c23f60 authored by Andy Shevchenko's avatar Andy Shevchenko

pinctrl: merrifield: Switch to to embedded struct pingroup

Since struct intel_pingroup got a new member, switch the driver to use it.
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
parent a7f9757c
...@@ -520,7 +520,7 @@ static const char *mrfld_get_group_name(struct pinctrl_dev *pctldev, ...@@ -520,7 +520,7 @@ static const char *mrfld_get_group_name(struct pinctrl_dev *pctldev,
{ {
struct mrfld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev); struct mrfld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev);
return mp->groups[group].name; return mp->groups[group].grp.name;
} }
static int mrfld_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group, static int mrfld_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group,
...@@ -528,8 +528,8 @@ static int mrfld_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group, ...@@ -528,8 +528,8 @@ static int mrfld_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group,
{ {
struct mrfld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev); struct mrfld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev);
*pins = mp->groups[group].pins; *pins = mp->groups[group].grp.pins;
*npins = mp->groups[group].npins; *npins = mp->groups[group].grp.npins;
return 0; return 0;
} }
...@@ -604,15 +604,15 @@ static int mrfld_pinmux_set_mux(struct pinctrl_dev *pctldev, ...@@ -604,15 +604,15 @@ static int mrfld_pinmux_set_mux(struct pinctrl_dev *pctldev,
* All pins in the groups needs to be accessible and writable * All pins in the groups needs to be accessible and writable
* before we can enable the mux for this group. * before we can enable the mux for this group.
*/ */
for (i = 0; i < grp->npins; i++) { for (i = 0; i < grp->grp.npins; i++) {
if (!mrfld_buf_available(mp, grp->pins[i])) if (!mrfld_buf_available(mp, grp->grp.pins[i]))
return -EBUSY; return -EBUSY;
} }
/* Now enable the mux setting for each pin in the group */ /* Now enable the mux setting for each pin in the group */
raw_spin_lock_irqsave(&mp->lock, flags); raw_spin_lock_irqsave(&mp->lock, flags);
for (i = 0; i < grp->npins; i++) for (i = 0; i < grp->grp.npins; i++)
mrfld_update_bufcfg(mp, grp->pins[i], bits, mask); mrfld_update_bufcfg(mp, grp->grp.pins[i], bits, mask);
raw_spin_unlock_irqrestore(&mp->lock, flags); raw_spin_unlock_irqrestore(&mp->lock, flags);
return 0; return 0;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment