Commit 99aa47e0 authored by Mateusz Kulikowski's avatar Mateusz Kulikowski Committed by Greg Kroah-Hartman

staging: rtl8192e: Rename read_nic_dword

Use naming schema found in other rtlwifi devices.
Rename read_nic_dword to rtl92e_readl.
Signed-off-by: default avatarMateusz Kulikowski <mateusz.kulikowski@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent b59a4ca3
......@@ -143,7 +143,7 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val)
u32 RegRCR, Type;
Type = ((u8 *)(val))[0];
RegRCR = read_nic_dword(dev, RCR);
RegRCR = rtl92e_readl(dev, RCR);
priv->ReceiveConfig = RegRCR;
if (Type == true)
......@@ -631,7 +631,7 @@ void rtl92e_get_eeprom_size(struct net_device *dev)
struct r8192_priv *priv = rtllib_priv(dev);
RT_TRACE(COMP_INIT, "===========>%s()\n", __func__);
curCR = read_nic_dword(dev, EPROM_CMD);
curCR = rtl92e_readl(dev, EPROM_CMD);
RT_TRACE(COMP_INIT, "read from Reg Cmd9346CR(%x):%x\n", EPROM_CMD,
curCR);
priv->epromtype = (curCR & EPROM_CMD_9356SEL) ? EEPROM_93C56 :
......@@ -729,7 +729,7 @@ bool rtl92e_start_adapter(struct net_device *dev)
if (priv->RegRfOff)
priv->rtllib->eRFPowerState = eRfOff;
ulRegRead = read_nic_dword(dev, CPU_GEN);
ulRegRead = rtl92e_readl(dev, CPU_GEN);
if (priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
ulRegRead |= CPU_GEN_SYSTEM_RESET;
else if (priv->pFirmware->firmware_status == FW_STATUS_5_READY)
......@@ -759,7 +759,7 @@ bool rtl92e_start_adapter(struct net_device *dev)
priv->LoopbackMode = RTL819X_NO_LOOPBACK;
if (priv->ResetProgress == RESET_TYPE_NORESET) {
ulRegRead = read_nic_dword(dev, CPU_GEN);
ulRegRead = rtl92e_readl(dev, CPU_GEN);
if (priv->LoopbackMode == RTL819X_NO_LOOPBACK)
ulRegRead = ((ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) |
CPU_GEN_NO_LOOPBACK_SET);
......@@ -800,7 +800,7 @@ bool rtl92e_start_adapter(struct net_device *dev)
rtl8192_tx_enable(dev);
rtl8192_rx_enable(dev);
ulRegRead = (0xFFF00000 & read_nic_dword(dev, RRSR)) |
ulRegRead = (0xFFF00000 & rtl92e_readl(dev, RRSR)) |
RATE_ALL_OFDM_AG | RATE_ALL_CCK;
write_nic_dword(dev, RRSR, ulRegRead);
write_nic_dword(dev, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
......@@ -1010,7 +1010,7 @@ void rtl92e_link_change(struct net_device *dev)
if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC) {
u32 reg = 0;
reg = read_nic_dword(dev, RCR);
reg = rtl92e_readl(dev, RCR);
if (priv->rtllib->state == RTLLIB_LINKED) {
if (ieee->IntelPromiscuousModeInfo.bPromiscuousOn)
;
......@@ -2069,7 +2069,7 @@ bool rtl92e_get_rx_stats(struct net_device *dev, struct rtllib_rx_stats *stats,
(pDrvInfo->FirstAGGR == 1);
stats->TimeStampLow = pDrvInfo->TSFL;
stats->TimeStampHigh = read_nic_dword(dev, TSFR+4);
stats->TimeStampHigh = rtl92e_readl(dev, TSFR+4);
rtl819x_UpdateRxPktTimeStamp(dev, stats);
......@@ -2120,7 +2120,7 @@ void rtl92e_stop_adapter(struct net_device *dev, bool reset)
if (!priv->rtllib->bSupportRemoteWakeUp) {
rtl92e_set_rf_off(dev);
ulRegRead = read_nic_dword(dev, CPU_GEN);
ulRegRead = rtl92e_readl(dev, CPU_GEN);
ulRegRead |= CPU_GEN_SYSTEM_RESET;
write_nic_dword(dev, CPU_GEN, ulRegRead);
} else {
......@@ -2247,7 +2247,7 @@ void rtl92e_clear_irq(struct net_device *dev)
{
u32 tmp = 0;
tmp = read_nic_dword(dev, ISR);
tmp = rtl92e_readl(dev, ISR);
write_nic_dword(dev, ISR, tmp);
}
......@@ -2275,7 +2275,7 @@ void rtl92e_enable_tx(struct net_device *dev)
void rtl92e_ack_irq(struct net_device *dev, u32 *p_inta, u32 *p_intb)
{
*p_inta = read_nic_dword(dev, ISR);
*p_inta = rtl92e_readl(dev, ISR);
write_nic_dword(dev, ISR, *p_inta);
}
......
......@@ -109,7 +109,7 @@ static bool CPUcheck_maincodeok_turnonCPU(struct net_device *dev)
timeout = jiffies + msecs_to_jiffies(200);
while (time_before(jiffies, timeout)) {
CPU_status = read_nic_dword(dev, CPU_GEN);
CPU_status = rtl92e_readl(dev, CPU_GEN);
if (CPU_status & CPU_GEN_PUT_CODE_OK)
break;
mdelay(2);
......@@ -122,14 +122,14 @@ static bool CPUcheck_maincodeok_turnonCPU(struct net_device *dev)
RT_TRACE(COMP_FIRMWARE, "Download Firmware: Put code ok!\n");
}
CPU_status = read_nic_dword(dev, CPU_GEN);
CPU_status = rtl92e_readl(dev, CPU_GEN);
write_nic_byte(dev, CPU_GEN,
(u8)((CPU_status|CPU_GEN_PWR_STB_CPU)&0xff));
mdelay(1);
timeout = jiffies + msecs_to_jiffies(200);
while (time_before(jiffies, timeout)) {
CPU_status = read_nic_dword(dev, CPU_GEN);
CPU_status = rtl92e_readl(dev, CPU_GEN);
if (CPU_status&CPU_GEN_BOOT_RDY)
break;
mdelay(2);
......@@ -158,7 +158,7 @@ static bool CPUcheck_firmware_ready(struct net_device *dev)
timeout = jiffies + msecs_to_jiffies(20);
while (time_before(jiffies, timeout)) {
CPU_status = read_nic_dword(dev, CPU_GEN);
CPU_status = rtl92e_readl(dev, CPU_GEN);
if (CPU_status&CPU_GEN_FIRM_RDY)
break;
mdelay(2);
......
......@@ -87,7 +87,7 @@ void rtl92e_set_bb_reg(struct net_device *dev, u32 dwRegAddr, u32 dwBitMask,
u32 OriginalValue, BitShift, NewValue;
if (dwBitMask != bMaskDWord) {
OriginalValue = read_nic_dword(dev, dwRegAddr);
OriginalValue = rtl92e_readl(dev, dwRegAddr);
BitShift = rtl8192_CalculateBitShift(dwBitMask);
NewValue = (((OriginalValue) & (~dwBitMask)) |
(dwData << BitShift));
......@@ -100,7 +100,7 @@ u32 rtl92e_get_bb_reg(struct net_device *dev, u32 dwRegAddr, u32 dwBitMask)
{
u32 Ret = 0, OriginalValue, BitShift;
OriginalValue = read_nic_dword(dev, dwRegAddr);
OriginalValue = rtl92e_readl(dev, dwRegAddr);
BitShift = rtl8192_CalculateBitShift(dwBitMask);
Ret = (OriginalValue & dwBitMask) >> BitShift;
......@@ -287,20 +287,20 @@ static u32 phy_FwRFSerialRead(struct net_device *dev,
Data |= ((Offset & 0xFF) << 12);
Data |= ((eRFPath & 0x3) << 20);
Data |= 0x80000000;
while (read_nic_dword(dev, QPNR)&0x80000000) {
while (rtl92e_readl(dev, QPNR) & 0x80000000) {
if (time++ < 100)
udelay(10);
else
break;
}
write_nic_dword(dev, QPNR, Data);
while (read_nic_dword(dev, QPNR) & 0x80000000) {
while (rtl92e_readl(dev, QPNR) & 0x80000000) {
if (time++ < 100)
udelay(10);
else
return 0;
}
return read_nic_dword(dev, RF_DATA);
return rtl92e_readl(dev, RF_DATA);
}
......@@ -315,7 +315,7 @@ static void phy_FwRFSerialWrite(struct net_device *dev,
Data |= 0x400000;
Data |= 0x80000000;
while (read_nic_dword(dev, QPNR) & 0x80000000) {
while (rtl92e_readl(dev, QPNR) & 0x80000000) {
if (time++ < 100)
udelay(10);
else
......@@ -514,7 +514,7 @@ bool rtl92e_check_bb_and_rf(struct net_device *dev, enum hw90_block CheckBlock,
case HW90_BLOCK_PHY1:
write_nic_dword(dev, WriteAddr[CheckBlock],
WriteData[i]);
dwRegRead = read_nic_dword(dev, WriteAddr[CheckBlock]);
dwRegRead = rtl92e_readl(dev, WriteAddr[CheckBlock]);
break;
case HW90_BLOCK_RF:
......@@ -555,7 +555,7 @@ static bool rtl8192_BB_Config_ParaFile(struct net_device *dev)
bRegValue = rtl92e_readb(dev, BB_GLOBAL_RESET);
write_nic_byte(dev, BB_GLOBAL_RESET, (bRegValue|BB_GLOBAL_RESET_BIT));
dwRegValue = read_nic_dword(dev, CPU_GEN);
dwRegValue = rtl92e_readl(dev, CPU_GEN);
write_nic_dword(dev, CPU_GEN, (dwRegValue&(~CPU_GEN_BB_RST)));
for (eCheckItem = (enum hw90_block)HW90_BLOCK_PHY0;
......@@ -573,7 +573,7 @@ static bool rtl8192_BB_Config_ParaFile(struct net_device *dev)
rtl92e_set_bb_reg(dev, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x0);
rtl8192_phyConfigBB(dev, BaseBand_Config_PHY_REG);
dwRegValue = read_nic_dword(dev, CPU_GEN);
dwRegValue = rtl92e_readl(dev, CPU_GEN);
write_nic_dword(dev, CPU_GEN, (dwRegValue|CPU_GEN_BB_RST));
rtl8192_phyConfigBB(dev, BaseBand_Config_AGC_TAB);
......@@ -607,17 +607,17 @@ void rtl92e_get_tx_power(struct net_device *dev)
struct r8192_priv *priv = rtllib_priv(dev);
priv->MCSTxPowerLevelOriginalOffset[0] =
read_nic_dword(dev, rTxAGC_Rate18_06);
rtl92e_readl(dev, rTxAGC_Rate18_06);
priv->MCSTxPowerLevelOriginalOffset[1] =
read_nic_dword(dev, rTxAGC_Rate54_24);
rtl92e_readl(dev, rTxAGC_Rate54_24);
priv->MCSTxPowerLevelOriginalOffset[2] =
read_nic_dword(dev, rTxAGC_Mcs03_Mcs00);
rtl92e_readl(dev, rTxAGC_Mcs03_Mcs00);
priv->MCSTxPowerLevelOriginalOffset[3] =
read_nic_dword(dev, rTxAGC_Mcs07_Mcs04);
rtl92e_readl(dev, rTxAGC_Mcs07_Mcs04);
priv->MCSTxPowerLevelOriginalOffset[4] =
read_nic_dword(dev, rTxAGC_Mcs11_Mcs08);
rtl92e_readl(dev, rTxAGC_Mcs11_Mcs08);
priv->MCSTxPowerLevelOriginalOffset[5] =
read_nic_dword(dev, rTxAGC_Mcs15_Mcs12);
rtl92e_readl(dev, rTxAGC_Mcs15_Mcs12);
priv->DefaultInitialGain[0] = rtl92e_readb(dev, rOFDM0_XAAGCCore1);
priv->DefaultInitialGain[1] = rtl92e_readb(dev, rOFDM0_XBAGCCore1);
......@@ -629,7 +629,7 @@ void rtl92e_get_tx_power(struct net_device *dev)
priv->DefaultInitialGain[2], priv->DefaultInitialGain[3]);
priv->framesync = rtl92e_readb(dev, rOFDM0_RxDetector3);
priv->framesyncC34 = read_nic_dword(dev, rOFDM0_RxDetector2);
priv->framesyncC34 = rtl92e_readl(dev, rOFDM0_RxDetector2);
RT_TRACE(COMP_INIT, "Default framesync (0x%x) = 0x%x\n",
rOFDM0_RxDetector3, priv->framesync);
priv->SifsTime = read_nic_word(dev, SIFS);
......
......@@ -115,7 +115,7 @@ u8 rtl92e_readb(struct net_device *dev, int x)
return 0xff & readb((u8 __iomem *)dev->mem_start + x);
}
u32 read_nic_dword(struct net_device *dev, int x)
u32 rtl92e_readl(struct net_device *dev, int x)
{
return readl((u8 __iomem *)dev->mem_start + x);
}
......@@ -2204,7 +2204,7 @@ static void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)
rtl8192_rx_normal(priv->rtllib->dev);
write_nic_dword(priv->rtllib->dev, INTA_MASK,
read_nic_dword(priv->rtllib->dev, INTA_MASK) | IMR_RDU);
rtl92e_readl(priv->rtllib->dev, INTA_MASK) | IMR_RDU);
}
/****************************************************************************
......@@ -2536,7 +2536,7 @@ static irqreturn_t rtl8192_interrupt(int irq, void *netdev)
RT_TRACE(COMP_INTR, "rx descriptor unavailable!\n");
priv->stats.rxrdu++;
write_nic_dword(dev, INTA_MASK,
read_nic_dword(dev, INTA_MASK) & ~IMR_RDU);
rtl92e_readl(dev, INTA_MASK) & ~IMR_RDU);
tasklet_schedule(&priv->irq_rx_tasklet);
}
......
......@@ -579,7 +579,7 @@ struct r8192_priv {
extern const struct ethtool_ops rtl819x_ethtool_ops;
u8 rtl92e_readb(struct net_device *dev, int x);
u32 read_nic_dword(struct net_device *dev, int x);
u32 rtl92e_readl(struct net_device *dev, int x);
u16 read_nic_word(struct net_device *dev, int x);
void write_nic_byte(struct net_device *dev, int x, u8 y);
void write_nic_word(struct net_device *dev, int x, u16 y);
......
......@@ -444,7 +444,7 @@ static void dm_check_rate_adaptive(struct net_device *dev)
if (priv->rtllib->GetHalfNmodeSupportByAPsHandler(dev))
targetRATR &= 0xf00fffff;
currentRATR = read_nic_dword(dev, RATR0);
currentRATR = rtl92e_readl(dev, RATR0);
if (targetRATR != currentRATR) {
u32 ratr_value;
......@@ -2570,7 +2570,7 @@ static void dm_check_txrateandretrycount(struct net_device *dev)
ieee->softmac_stats.last_packet_rate = rtl92e_readb(dev,
Initial_Tx_Rate_Reg);
ieee->softmac_stats.txretrycount = read_nic_dword(dev,
ieee->softmac_stats.txretrycount = rtl92e_readl(dev,
Tx_Retry_Count_Reg);
}
......
......@@ -46,7 +46,7 @@ int rtl8192E_suspend(struct pci_dev *pdev, pm_message_t state)
if (!priv->rtllib->bSupportRemoteWakeUp) {
rtl92e_set_rf_state(dev, eRfOff, RF_CHANGE_BY_INIT, true);
ulRegRead = read_nic_dword(dev, CPU_GEN);
ulRegRead = rtl92e_readl(dev, CPU_GEN);
ulRegRead |= CPU_GEN_SYSTEM_RESET;
write_nic_dword(dev, CPU_GEN, ulRegRead);
} else {
......
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