Commit 99e45e29 authored by Olof Johansson's avatar Olof Johansson

Merge tag 'v5.6-rockchip-dts64-1' of...

Merge tag 'v5.6-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

New boards are the Radxa Rock Pi N10 using the VMARC SOM and Dalang
carrier board, separate versions for the two rockpro64 hardware revisions
which switched a pin between revisions. The rockpro64 also got
bluetooth support now.

The px30 got a lot of attention with dsi, gpu and thermal support.
Similarly the rk3399-roc-pc board also got attention with mtd flash,
sdr104 mode, hdmi sound, gpu and a lot of other smaller improvements.

Other than that there is a new gpu-cooling device for rk3399 a cpu
idle-state for rk3328 and more small improvements across a number
of boards.

* tag 'v5.6-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (37 commits)
  arm64: dts: rockchip: Enable mp8859 regulator on rk3399-roc-pc
  arm64: dts: rockchip: rk3399-hugsun-x99: remove supports-sd and supports-emmc options
  arm64: dts: rockchip: rk3399-firefly: remove num-slots from &sdio0 node
  arm64: dts: rockchip: Add PX30 LVDS
  arm64: dts: rockchip: add dsi controller for px30
  arm64: dts: rockchip: Add PX30 DSI DPHY
  arm64: dts: rockchip: Add RK3328 idle state
  arm64: dts: rockchip: remove identical &uart0 node from rk3368-lion-haikou
  arm64: dts: rockchip: Add Radxa Rock Pi N10 initial support
  ARM: dts: rockchip: Add Radxa Dalang Carrier board
  arm64: dts: rockchip: Add VMARC RK3399Pro SOM initial support
  dt-bindings: arm: rockchip: Add Rock Pi N10 binding
  arm64: dts: rockchip: hook up bluetooth at uart0 on rockpro64
  arm64: dts: rockchip: enable wifi module at sdio0 on rockpro64
  arm64: dts: rockchip: split rk3399-rockpro64 for v2 and v2.1 boards
  arm64: dts: rockchip: enable the gpu on px30-evb
  arm64: dts: rockchip: add the gpu for px30
  dt-bindings: gpu: mali-bifrost: Add Rockchip PX30
  arm64: dts: rockchip: Add GPU cooling device for RK3399
  arm64: dts: rockchip: Add regulators for PCIe for Radxa Rock Pi 4 board
  ...

Link: https://lore.kernel.org/r/5115625.yBEeHQkg2z@philSigned-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 3886edbb 1fc61ed0
...@@ -409,6 +409,9 @@ properties: ...@@ -409,6 +409,9 @@ properties:
- description: Pine64 RockPro64 - description: Pine64 RockPro64
items: items:
- enum:
- pine64,rockpro64-v2.1
- pine64,rockpro64-v2.0
- const: pine64,rockpro64 - const: pine64,rockpro64
- const: rockchip,rk3399 - const: rockchip,rk3399
...@@ -422,6 +425,12 @@ properties: ...@@ -422,6 +425,12 @@ properties:
- const: radxa,rockpi4 - const: radxa,rockpi4
- const: rockchip,rk3399 - const: rockchip,rk3399
- description: Radxa ROCK Pi N10
items:
- const: radxa,rockpi-n10
- const: vamrs,rk3399pro-vmarc-som
- const: rockchip,rk3399pro
- description: Radxa Rock2 Square - description: Radxa Rock2 Square
items: items:
- const: radxa,rock2-square - const: radxa,rock2-square
......
...@@ -18,6 +18,7 @@ properties: ...@@ -18,6 +18,7 @@ properties:
- enum: - enum:
- amlogic,meson-g12a-mali - amlogic,meson-g12a-mali
- realtek,rtd1619-mali - realtek,rtd1619-mali
- rockchip,px30-mali
- const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
reg: reg:
......
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
* Copyright (c) 2019 Radxa Limited
* Copyright (c) 2019 Amarula Solutions(India)
*/
#include <dt-bindings/pwm/pwm.h>
/ {
chosen {
stdout-path = "serial2:1500000n8";
};
};
&gmac {
status = "okay";
};
&i2c1 {
status = "okay";
i2c-scl-rising-time-ns = <140>;
i2c-scl-falling-time-ns = <30>;
};
&i2c2 {
status = "okay";
clock-frequency = <400000>;
hym8563: hym8563@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "hym8563";
pinctrl-names = "default";
pinctrl-0 = <&hym8563_int>;
interrupt-parent = <&gpio4>;
interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
};
};
&pwm0 {
status = "okay";
};
&pwm2 {
status = "okay";
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
disable-wp;
vqmmc-supply = <&vccio_sd>;
max-frequency = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer &uart0_cts>;
status = "okay";
};
&uart2 {
status = "okay";
};
&pinctrl {
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins =
<4 RK_PD6 0 &pcfg_pull_up>;
};
};
};
...@@ -33,6 +33,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb ...@@ -33,6 +33,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
...@@ -132,6 +132,11 @@ &gmac { ...@@ -132,6 +132,11 @@ &gmac {
status = "okay"; status = "okay";
}; };
&gpu {
mali-supply = <&vdd_log>;
status = "okay";
};
&i2c0 { &i2c0 {
status = "okay"; status = "okay";
...@@ -485,6 +490,12 @@ &sdio { ...@@ -485,6 +490,12 @@ &sdio {
status = "okay"; status = "okay";
}; };
&tsadc {
rockchip,hw-tshut-mode = <1>;
rockchip,hw-tshut-polarity = <1>;
status = "okay";
};
&u2phy { &u2phy {
status = "okay"; status = "okay";
......
...@@ -10,6 +10,7 @@ ...@@ -10,6 +10,7 @@
#include <dt-bindings/pinctrl/rockchip.h> #include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/power/px30-power.h> #include <dt-bindings/power/px30-power.h>
#include <dt-bindings/soc/rockchip,boot-mode.h> #include <dt-bindings/soc/rockchip,boot-mode.h>
#include <dt-bindings/thermal/thermal.h>
/ { / {
compatible = "rockchip,px30"; compatible = "rockchip,px30";
...@@ -113,16 +114,11 @@ cpu0_opp_table: cpu0-opp-table { ...@@ -113,16 +114,11 @@ cpu0_opp_table: cpu0-opp-table {
compatible = "operating-points-v2"; compatible = "operating-points-v2";
opp-shared; opp-shared;
opp-408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <950000 950000 1350000>;
clock-latency-ns = <40000>;
opp-suspend;
};
opp-600000000 { opp-600000000 {
opp-hz = /bits/ 64 <600000000>; opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <950000 950000 1350000>; opp-microvolt = <950000 950000 1350000>;
clock-latency-ns = <40000>; clock-latency-ns = <40000>;
opp-suspend;
}; };
opp-816000000 { opp-816000000 {
opp-hz = /bits/ 64 <816000000>; opp-hz = /bits/ 64 <816000000>;
...@@ -181,6 +177,55 @@ timer { ...@@ -181,6 +177,55 @@ timer {
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
}; };
thermal_zones: thermal-zones {
soc_thermal: soc-thermal {
polling-delay-passive = <20>;
polling-delay = <1000>;
sustainable-power = <750>;
thermal-sensors = <&tsadc 0>;
trips {
threshold: trip-point-0 {
temperature = <70000>;
hysteresis = <2000>;
type = "passive";
};
target: trip-point-1 {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
soc_crit: soc-crit {
temperature = <115000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&target>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
contribution = <4096>;
};
map1 {
trip = <&target>;
cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
contribution = <4096>;
};
};
};
gpu_thermal: gpu-thermal {
polling-delay-passive = <100>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
thermal-sensors = <&tsadc 1>;
};
};
xin24m: xin24m { xin24m: xin24m {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>; #clock-cells = <0>;
...@@ -365,6 +410,33 @@ io_domains: io-domains { ...@@ -365,6 +410,33 @@ io_domains: io-domains {
compatible = "rockchip,px30-io-voltage-domain"; compatible = "rockchip,px30-io-voltage-domain";
status = "disabled"; status = "disabled";
}; };
lvds: lvds {
compatible = "rockchip,px30-lvds";
#address-cells = <1>;
#size-cells = <0>;
phys = <&dsi_dphy>;
phy-names = "dphy";
rockchip,grf = <&grf>;
rockchip,output = "lvds";
status = "disabled";
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
lvds_vopb_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&vopb_out_lvds>;
};
lvds_vopl_in: endpoint@1 {
reg = <1>;
remote-endpoint = <&vopl_out_lvds>;
};
};
};
}; };
uart1: serial@ff158000 { uart1: serial@ff158000 {
...@@ -645,6 +717,26 @@ dmac: dmac@ff240000 { ...@@ -645,6 +717,26 @@ dmac: dmac@ff240000 {
}; };
}; };
tsadc: tsadc@ff280000 {
compatible = "rockchip,px30-tsadc";
reg = <0x0 0xff280000 0x0 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
assigned-clocks = <&cru SCLK_TSADC>;
assigned-clock-rates = <50000>;
clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
clock-names = "tsadc", "apb_pclk";
resets = <&cru SRST_TSADC>;
reset-names = "tsadc-apb";
rockchip,grf = <&grf>;
rockchip,hw-tshut-temp = <120000>;
pinctrl-names = "init", "default", "sleep";
pinctrl-0 = <&tsadc_otp_gpio>;
pinctrl-1 = <&tsadc_otp_out>;
pinctrl-2 = <&tsadc_otp_gpio>;
#thermal-sensor-cells = <1>;
status = "disabled";
};
saradc: saradc@ff288000 { saradc: saradc@ff288000 {
compatible = "rockchip,px30-saradc", "rockchip,rk3399-saradc"; compatible = "rockchip,px30-saradc", "rockchip,rk3399-saradc";
reg = <0x0 0xff288000 0x0 0x100>; reg = <0x0 0xff288000 0x0 0x100>;
...@@ -755,6 +847,18 @@ u2phy_otg: otg-port { ...@@ -755,6 +847,18 @@ u2phy_otg: otg-port {
}; };
}; };
dsi_dphy: phy@ff2e0000 {
compatible = "rockchip,px30-dsi-dphy";
reg = <0x0 0xff2e0000 0x0 0x10000>;
clocks = <&pmucru SCLK_MIPIDSIPHY_REF>, <&cru PCLK_MIPIDSIPHY>;
clock-names = "ref", "pclk";
resets = <&cru SRST_MIPIDSIPHY_P>;
reset-names = "apb";
#phy-cells = <0>;
power-domains = <&power PX30_PD_VO>;
status = "disabled";
};
usb20_otg: usb@ff300000 { usb20_otg: usb@ff300000 {
compatible = "rockchip,px30-usb", "rockchip,rk3066-usb", compatible = "rockchip,px30-usb", "rockchip,rk3066-usb",
"snps,dwc2"; "snps,dwc2";
...@@ -865,6 +969,57 @@ emmc: dwmmc@ff390000 { ...@@ -865,6 +969,57 @@ emmc: dwmmc@ff390000 {
status = "disabled"; status = "disabled";
}; };
gpu: gpu@ff400000 {
compatible = "rockchip,px30-mali", "arm,mali-bifrost";
reg = <0x0 0xff400000 0x0 0x4000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "job", "mmu", "gpu";
clocks = <&cru SCLK_GPU>;
#cooling-cells = <2>;
power-domains = <&power PX30_PD_GPU>;
status = "disabled";
};
dsi: dsi@ff450000 {
compatible = "rockchip,px30-mipi-dsi";
reg = <0x0 0xff450000 0x0 0x10000>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_MIPI_DSI>;
clock-names = "pclk";
phys = <&dsi_dphy>;
phy-names = "dphy";
power-domains = <&power PX30_PD_VO>;
resets = <&cru SRST_MIPIDSI_HOST_P>;
reset-names = "apb";
rockchip,grf = <&grf>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
dsi_in_vopb: endpoint@0 {
reg = <0>;
remote-endpoint = <&vopb_out_dsi>;
};
dsi_in_vopl: endpoint@1 {
reg = <1>;
remote-endpoint = <&vopl_out_dsi>;
};
};
};
};
vopb: vop@ff460000 { vopb: vop@ff460000 {
compatible = "rockchip,px30-vop-big"; compatible = "rockchip,px30-vop-big";
reg = <0x0 0xff460000 0x0 0xefc>; reg = <0x0 0xff460000 0x0 0xefc>;
...@@ -882,6 +1037,16 @@ vopb: vop@ff460000 { ...@@ -882,6 +1037,16 @@ vopb: vop@ff460000 {
vopb_out: port { vopb_out: port {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
vopb_out_dsi: endpoint@0 {
reg = <0>;
remote-endpoint = <&dsi_in_vopb>;
};
vopb_out_lvds: endpoint@1 {
reg = <1>;
remote-endpoint = <&lvds_vopb_in>;
};
}; };
}; };
...@@ -914,6 +1079,16 @@ vopl: vop@ff470000 { ...@@ -914,6 +1079,16 @@ vopl: vop@ff470000 {
vopl_out: port { vopl_out: port {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
vopl_out_dsi: endpoint@0 {
reg = <0>;
remote-endpoint = <&dsi_in_vopl>;
};
vopl_out_lvds: endpoint@1 {
reg = <1>;
remote-endpoint = <&lvds_vopl_in>;
};
}; };
}; };
......
...@@ -41,6 +41,7 @@ cpu0: cpu@0 { ...@@ -41,6 +41,7 @@ cpu0: cpu@0 {
reg = <0x0 0x0>; reg = <0x0 0x0>;
clocks = <&cru ARMCLK>; clocks = <&cru ARMCLK>;
#cooling-cells = <2>; #cooling-cells = <2>;
cpu-idle-states = <&CPU_SLEEP>;
dynamic-power-coefficient = <120>; dynamic-power-coefficient = <120>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
...@@ -53,6 +54,7 @@ cpu1: cpu@1 { ...@@ -53,6 +54,7 @@ cpu1: cpu@1 {
reg = <0x0 0x1>; reg = <0x0 0x1>;
clocks = <&cru ARMCLK>; clocks = <&cru ARMCLK>;
#cooling-cells = <2>; #cooling-cells = <2>;
cpu-idle-states = <&CPU_SLEEP>;
dynamic-power-coefficient = <120>; dynamic-power-coefficient = <120>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
...@@ -65,6 +67,7 @@ cpu2: cpu@2 { ...@@ -65,6 +67,7 @@ cpu2: cpu@2 {
reg = <0x0 0x2>; reg = <0x0 0x2>;
clocks = <&cru ARMCLK>; clocks = <&cru ARMCLK>;
#cooling-cells = <2>; #cooling-cells = <2>;
cpu-idle-states = <&CPU_SLEEP>;
dynamic-power-coefficient = <120>; dynamic-power-coefficient = <120>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
...@@ -77,12 +80,26 @@ cpu3: cpu@3 { ...@@ -77,12 +80,26 @@ cpu3: cpu@3 {
reg = <0x0 0x3>; reg = <0x0 0x3>;
clocks = <&cru ARMCLK>; clocks = <&cru ARMCLK>;
#cooling-cells = <2>; #cooling-cells = <2>;
cpu-idle-states = <&CPU_SLEEP>;
dynamic-power-coefficient = <120>; dynamic-power-coefficient = <120>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
operating-points-v2 = <&cpu0_opp_table>; operating-points-v2 = <&cpu0_opp_table>;
}; };
idle-states {
entry-method = "psci";
CPU_SLEEP: cpu-sleep {
compatible = "arm,idle-state";
local-timer-stop;
arm,psci-suspend-param = <0x0010000>;
entry-latency-us = <120>;
exit-latency-us = <250>;
min-residency-us = <900>;
};
};
l2: l2-cache0 { l2: l2-cache0 {
compatible = "cache"; compatible = "cache";
}; };
......
...@@ -83,12 +83,6 @@ &spi2 { ...@@ -83,12 +83,6 @@ &spi2 {
status = "okay"; status = "okay";
}; };
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
status = "okay";
};
&usb_otg { &usb_otg {
dr_mode = "otg"; dr_mode = "otg";
status = "okay"; status = "okay";
......
...@@ -206,7 +206,7 @@ vdd_log: vdd-log { ...@@ -206,7 +206,7 @@ vdd_log: vdd-log {
regulator-name = "vdd_log"; regulator-name = "vdd_log";
regulator-always-on; regulator-always-on;
regulator-boot-on; regulator-boot-on;
regulator-min-microvolt = <800000>; regulator-min-microvolt = <430000>;
regulator-max-microvolt = <1400000>; regulator-max-microvolt = <1400000>;
vin-supply = <&vcc_sys>; vin-supply = <&vcc_sys>;
}; };
...@@ -660,7 +660,6 @@ &sdio0 { ...@@ -660,7 +660,6 @@ &sdio0 {
keep-power-in-suspend; keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>; mmc-pwrseq = <&sdio_pwrseq>;
non-removable; non-removable;
num-slots = <1>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
sd-uhs-sdr104; sd-uhs-sdr104;
......
...@@ -556,7 +556,6 @@ &saradc { ...@@ -556,7 +556,6 @@ &saradc {
&sdmmc { &sdmmc {
clock-frequency = <150000000>; clock-frequency = <150000000>;
clock-freq-min-max = <200000 150000000>; clock-freq-min-max = <200000 150000000>;
supports-sd;
bus-width = <4>; bus-width = <4>;
cap-mmc-highspeed; cap-mmc-highspeed;
cap-sd-highspeed; cap-sd-highspeed;
...@@ -572,7 +571,6 @@ &sdhci { ...@@ -572,7 +571,6 @@ &sdhci {
bus-width = <8>; bus-width = <8>;
mmc-hs400-1_8v; mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe; mmc-hs400-enhanced-strobe;
supports-emmc;
non-removable; non-removable;
keep-power-in-suspend; keep-power-in-suspend;
status = "okay"; status = "okay";
......
...@@ -94,31 +94,9 @@ map3 { ...@@ -94,31 +94,9 @@ map3 {
}; };
}; };
&gpu_thermal { &pcie0 {
trips { num-lanes = <4>;
gpu_warm: gpu_warm { vpcie3v3-supply = <&vcc3v3_sys>;
temperature = <55000>;
hysteresis = <2000>;
type = "active";
};
gpu_hot: gpu_hot {
temperature = <65000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
map1 {
trip = <&gpu_warm>;
cooling-device = <&fan THERMAL_NO_LIMIT 1>;
};
map2 {
trip = <&gpu_hot>;
cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
};
};
}; };
&pinctrl { &pinctrl {
......
...@@ -48,7 +48,7 @@ vcc5v0_sys: vcc5v0-sys { ...@@ -48,7 +48,7 @@ vcc5v0_sys: vcc5v0-sys {
}; };
/* switched by pmic_sleep */ /* switched by pmic_sleep */
vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { vcc1v8_s3: vcc1v8-s3 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-always-on; regulator-always-on;
regulator-boot-on; regulator-boot-on;
...@@ -71,6 +71,27 @@ vcc3v0_sd: vcc3v0-sd { ...@@ -71,6 +71,27 @@ vcc3v0_sd: vcc3v0-sd {
vin-supply = <&vcc3v3_sys>; vin-supply = <&vcc3v3_sys>;
}; };
/*
* Really, this is supplied by vcc_1v8, and vcc1v8_s3 only
* drives the enable pin, but we can't quite model that.
*/
vcca0v9_s3: vcca0v9-s3 {
compatible = "regulator-fixed";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = "vcca0v9_s3";
vin-supply = <&vcc1v8_s3>;
};
/* As above, actually supplied by vcc3v3_sys */
vcca1v8_s3: vcca1v8-s3 {
compatible = "regulator-fixed";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca1v8_s3";
vin-supply = <&vcc1v8_s3>;
};
vbus_typec: vbus-typec { vbus_typec: vbus-typec {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-min-microvolt = <5000000>; regulator-min-microvolt = <5000000>;
...@@ -485,7 +506,9 @@ &pcie_phy { ...@@ -485,7 +506,9 @@ &pcie_phy {
&pcie0 { &pcie0 {
ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>; ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
max-link-speed = <2>; max-link-speed = <2>;
num-lanes = <4>; num-lanes = <2>;
vpcie0v9-supply = <&vcca0v9_s3>;
vpcie1v8-supply = <&vcca1v8_s3>;
status = "okay"; status = "okay";
}; };
......
...@@ -32,8 +32,6 @@ vcc3v3_pcie: vcc3v3-pcie { ...@@ -32,8 +32,6 @@ vcc3v3_pcie: vcc3v3-pcie {
gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&vcc3v3_pcie_en>; pinctrl-0 = <&vcc3v3_pcie_en>;
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
vin-supply = <&dc_12v>; vin-supply = <&dc_12v>;
...@@ -50,6 +48,8 @@ &pcie0 { ...@@ -50,6 +48,8 @@ &pcie0 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pcie_perst>; pinctrl-0 = <&pcie_perst>;
vpcie3v3-supply = <&vcc3v3_pcie>; vpcie3v3-supply = <&vcc3v3_pcie>;
vpcie1v8-supply = <&vcc1v8_pmu>;
vpcie0v9-supply = <&vcca_0v9>;
status = "okay"; status = "okay";
}; };
......
...@@ -110,20 +110,6 @@ vcc_vbus_typec0: vcc-vbus-typec0 { ...@@ -110,20 +110,6 @@ vcc_vbus_typec0: vcc-vbus-typec0 {
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
}; };
/*
* should be placed inside mp8859, but not until mp8859 has
* its own dt-binding.
*/
dc_12v: mp8859-dcdc1 {
compatible = "regulator-fixed";
regulator-name = "dc_12v";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
vin-supply = <&vcc_vbus_typec0>;
};
/* switched by pmic_sleep */ /* switched by pmic_sleep */
vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
...@@ -135,6 +121,19 @@ vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { ...@@ -135,6 +121,19 @@ vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
vin-supply = <&vcc_1v8>; vin-supply = <&vcc_1v8>;
}; };
vcc3v0_sd: vcc3v0-sd {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc3v0_sd_en>;
regulator-name = "vcc3v0_sd";
regulator-boot-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
vin-supply = <&vcc3v3_sys>;
};
vcc3v3_sys: vcc3v3-sys { vcc3v3_sys: vcc3v3-sys {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys"; regulator-name = "vcc3v3_sys";
...@@ -145,6 +144,16 @@ vcc3v3_sys: vcc3v3-sys { ...@@ -145,6 +144,16 @@ vcc3v3_sys: vcc3v3-sys {
vin-supply = <&dc_12v>; vin-supply = <&dc_12v>;
}; };
vcca_0v9: vcca-0v9 {
compatible = "regulator-fixed";
regulator-name = "vcca_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
vin-supply = <&vcc3v3_sys>;
};
/* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
vcc5v0_host: vcc5v0-host-regulator { vcc5v0_host: vcc5v0-host-regulator {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
...@@ -153,7 +162,6 @@ vcc5v0_host: vcc5v0-host-regulator { ...@@ -153,7 +162,6 @@ vcc5v0_host: vcc5v0-host-regulator {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en &hub_rst>; pinctrl-0 = <&vcc5v0_host_en &hub_rst>;
regulator-name = "vcc5v0_host"; regulator-name = "vcc5v0_host";
regulator-always-on;
vin-supply = <&vcc_sys>; vin-supply = <&vcc_sys>;
}; };
...@@ -175,7 +183,6 @@ vcc_sys: vcc-sys { ...@@ -175,7 +183,6 @@ vcc_sys: vcc-sys {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&vcc_sys_en>; pinctrl-0 = <&vcc_sys_en>;
regulator-name = "vcc_sys"; regulator-name = "vcc_sys";
regulator-always-on;
regulator-boot-on; regulator-boot-on;
regulator-min-microvolt = <5000000>; regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
...@@ -188,9 +195,9 @@ vdd_log: vdd-log { ...@@ -188,9 +195,9 @@ vdd_log: vdd-log {
regulator-name = "vdd_log"; regulator-name = "vdd_log";
regulator-always-on; regulator-always-on;
regulator-boot-on; regulator-boot-on;
regulator-min-microvolt = <800000>; regulator-min-microvolt = <450000>;
regulator-max-microvolt = <1400000>; regulator-max-microvolt = <1400000>;
vin-supply = <&vcc3v3_sys>; pwm-supply = <&vcc3v3_sys>;
}; };
}; };
...@@ -238,6 +245,11 @@ &gmac { ...@@ -238,6 +245,11 @@ &gmac {
status = "okay"; status = "okay";
}; };
&gpu {
mali-supply = <&vdd_gpu>;
status = "okay";
};
&hdmi { &hdmi {
ddc-i2c-bus = <&i2c3>; ddc-i2c-bus = <&i2c3>;
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -245,6 +257,10 @@ &hdmi { ...@@ -245,6 +257,10 @@ &hdmi {
status = "okay"; status = "okay";
}; };
&hdmi_sound {
status = "okay";
};
&i2c0 { &i2c0 {
clock-frequency = <400000>; clock-frequency = <400000>;
i2c-scl-rising-time-ns = <168>; i2c-scl-rising-time-ns = <168>;
...@@ -360,7 +376,6 @@ regulator-state-mem { ...@@ -360,7 +376,6 @@ regulator-state-mem {
vcc_sdio: LDO_REG4 { vcc_sdio: LDO_REG4 {
regulator-name = "vcc_sdio"; regulator-name = "vcc_sdio";
regulator-always-on;
regulator-boot-on; regulator-boot-on;
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3000000>; regulator-max-microvolt = <3000000>;
...@@ -465,8 +480,6 @@ vdd_gpu: regulator@41 { ...@@ -465,8 +480,6 @@ vdd_gpu: regulator@41 {
regulator-min-microvolt = <712500>; regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1500000>; regulator-max-microvolt = <1500000>;
regulator-ramp-delay = <1000>; regulator-ramp-delay = <1000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc3v3_sys>; vin-supply = <&vcc3v3_sys>;
regulator-state-mem { regulator-state-mem {
...@@ -519,6 +532,24 @@ fusb0: usb-typec@22 { ...@@ -519,6 +532,24 @@ fusb0: usb-typec@22 {
vbus-supply = <&vcc_vbus_typec0>; vbus-supply = <&vcc_vbus_typec0>;
status = "okay"; status = "okay";
}; };
mp8859: regulator@66 {
compatible = "mps,mp8859";
reg = <0x66>;
dc_12v: mp8859_dcdc {
regulator-name = "dc_12v";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc_vbus_typec0>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <12000000>;
};
};
};
}; };
&i2s0 { &i2s0 {
...@@ -559,7 +590,7 @@ pwr_key_l: pwr-key-l { ...@@ -559,7 +590,7 @@ pwr_key_l: pwr-key-l {
lcd-panel { lcd-panel {
lcd_panel_reset: lcd-panel-reset { lcd_panel_reset: lcd-panel-reset {
rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
}; };
}; };
...@@ -593,6 +624,12 @@ wifi_enable_h: wifi-enable-h { ...@@ -593,6 +624,12 @@ wifi_enable_h: wifi-enable-h {
}; };
}; };
sdmmc {
vcc3v0_sd_en: vcc3v0-sd-en {
rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic { pmic {
pmic_int_l: pmic-int-l { pmic_int_l: pmic-int-l {
rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
...@@ -645,24 +682,34 @@ &saradc { ...@@ -645,24 +682,34 @@ &saradc {
&sdmmc { &sdmmc {
bus-width = <4>; bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed; cap-sd-highspeed;
cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
disable-wp; disable-wp;
max-frequency = <150000000>; max-frequency = <150000000>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
sd-uhs-sdr104;
vmmc-supply = <&vcc3v0_sd>;
vqmmc-supply = <&vcc_sdio>;
status = "okay"; status = "okay";
}; };
&sdhci { &sdhci {
bus-width = <8>; bus-width = <8>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
non-removable; non-removable;
status = "okay"; status = "okay";
}; };
&spi1 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
};
};
&tcphy0 { &tcphy0 {
status = "okay"; status = "okay";
}; };
......
...@@ -53,6 +53,16 @@ vcc5v0_sys: vcc-sys { ...@@ -53,6 +53,16 @@ vcc5v0_sys: vcc-sys {
vin-supply = <&vcc12v_dcin>; vin-supply = <&vcc12v_dcin>;
}; };
vcc_0v9: vcc-0v9 {
compatible = "regulator-fixed";
regulator-name = "vcc_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
vin-supply = <&vcc3v3_sys>;
};
vcc3v3_pcie: vcc3v3-pcie-regulator { vcc3v3_pcie: vcc3v3-pcie-regulator {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
enable-active-high; enable-active-high;
...@@ -463,6 +473,22 @@ &pmu_io_domains { ...@@ -463,6 +473,22 @@ &pmu_io_domains {
pmu1830-supply = <&vcc_3v0>; pmu1830-supply = <&vcc_3v0>;
}; };
&pcie_phy {
status = "okay";
};
&pcie0 {
ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
max-link-speed = <2>;
num-lanes = <4>;
pinctrl-0 = <&pcie_clkreqnb_cpm>;
pinctrl-names = "default";
vpcie0v9-supply = <&vcc_0v9>;
vpcie1v8-supply = <&vcc_1v8>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};
&pinctrl { &pinctrl {
bt { bt {
bt_enable_h: bt-enable-h { bt_enable_h: bt-enable-h {
......
...@@ -76,6 +76,15 @@ vcc5v0_host: vcc5v0-host-regulator { ...@@ -76,6 +76,15 @@ vcc5v0_host: vcc5v0-host-regulator {
regulator-always-on; regulator-always-on;
vin-supply = <&vcc5v0_sys>; vin-supply = <&vcc5v0_sys>;
}; };
vcc_0v9: vcc-0v9 {
compatible = "regulator-fixed";
regulator-name = "vcc_0v9";
regulator-always-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
vin-supply = <&vcc3v3_sys>;
};
}; };
&cpu_l0 { &cpu_l0 {
...@@ -384,6 +393,8 @@ &pcie0 { ...@@ -384,6 +393,8 @@ &pcie0 {
num-lanes = <4>; num-lanes = <4>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pcie_clkreqn_cpm>; pinctrl-0 = <&pcie_clkreqn_cpm>;
vpcie0v9-supply = <&vcc_0v9>;
vpcie1v8-supply = <&vcca_1v8>;
vpcie3v3-supply = <&vcc3v3_pcie>; vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay"; status = "okay";
}; };
......
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
* Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com>
* Copyright (c) 2019 Katsuhiro Suzuki <katsuhiro@katsuster.net>
*/
/dts-v1/;
#include "rk3399-rockpro64.dtsi"
/ {
model = "Pine64 RockPro64 v2.0";
compatible = "pine64,rockpro64-v2.0", "pine64,rockpro64", "rockchip,rk3399";
};
&i2c1 {
es8316: codec@10 {
compatible = "everest,es8316";
reg = <0x10>;
clocks = <&cru SCLK_I2S_8CH_OUT>;
clock-names = "mclk";
#sound-dai-cells = <0>;
port {
es8316_p0_0: endpoint {
remote-endpoint = <&i2s1_p0_0>;
};
};
};
};
This diff is collapsed.
...@@ -828,6 +828,14 @@ gpu_crit: gpu_crit { ...@@ -828,6 +828,14 @@ gpu_crit: gpu_crit {
type = "critical"; type = "critical";
}; };
}; };
cooling-maps {
map0 {
trip = <&gpu_alert0>;
cooling-device =
<&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
}; };
}; };
...@@ -1887,6 +1895,7 @@ gpu: gpu@ff9a0000 { ...@@ -1887,6 +1895,7 @@ gpu: gpu@ff9a0000 {
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>; <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "gpu", "job", "mmu"; interrupt-names = "gpu", "job", "mmu";
clocks = <&cru ACLK_GPU>; clocks = <&cru ACLK_GPU>;
#cooling-cells = <2>;
power-domains = <&power RK3399_PD_GPU>; power-domains = <&power RK3399_PD_GPU>;
status = "disabled"; status = "disabled";
}; };
......
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
* Copyright (c) 2019 Radxa Limited
* Copyright (c) 2019 Amarula Solutions(India)
*/
/dts-v1/;
#include "rk3399.dtsi"
#include "rk3399-opp.dtsi"
#include "rk3399pro-vmarc-som.dtsi"
#include <arm/rockchip-radxa-dalang-carrier.dtsi>
/ {
model = "Radxa ROCK Pi N10";
compatible = "radxa,rockpi-n10", "rockchip,rk3399pro";
};
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
* Copyright (c) 2019 Vamrs Limited
* Copyright (c) 2019 Amarula Solutions(India)
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/pwm/pwm.h>
/ {
compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro";
clkin_gmac: external-gmac-clock {
compatible = "fixed-clock";
clock-frequency = <125000000>;
clock-output-names = "clkin_gmac";
#clock-cells = <0>;
};
vcc12v_dcin: vcc12v-dcin-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
vcc5v0_sys: vcc5v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcin>;
};
};
&cpu_l0 {
cpu-supply = <&vdd_cpu_l>;
};
&cpu_l1 {
cpu-supply = <&vdd_cpu_l>;
};
&cpu_l2 {
cpu-supply = <&vdd_cpu_l>;
};
&cpu_l3 {
cpu-supply = <&vdd_cpu_l>;
};
&emmc_phy {
status = "okay";
};
&gmac {
assigned-clocks = <&cru SCLK_RMII_SRC>;
assigned-clock-parents = <&clkin_gmac>;
clock_in_out = "input";
phy-supply = <&vcc_lan>;
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
tx_delay = <0x28>;
rx_delay = <0x11>;
};
&i2c0 {
clock-frequency = <400000>;
i2c-scl-rising-time-ns = <180>;
i2c-scl-falling-time-ns = <30>;
status = "okay";
rk809: pmic@20 {
compatible = "rockchip,rk809";
reg = <0x20>;
interrupt-parent = <&gpio1>;
interrupts = <RK_PC2 IRQ_TYPE_LEVEL_LOW>;
#clock-cells = <1>;
clock-output-names = "rk808-clkout1", "rk808-clkout2";
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_l>;
rockchip,system-power-controller;
wakeup-source;
vcc1-supply = <&vcc5v0_sys>;
vcc2-supply = <&vcc5v0_sys>;
vcc3-supply = <&vcc5v0_sys>;
vcc4-supply = <&vcc5v0_sys>;
vcc5-supply = <&vcc_buck5>;
vcc6-supply = <&vcc_buck5>;
vcc7-supply = <&vcc5v0_sys>;
vcc8-supply = <&vcc3v3_sys>;
vcc9-supply = <&vcc5v0_sys>;
regulators {
vdd_log: DCDC_REG1 {
regulator-name = "vdd_log";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1350000>;
regulator-initial-mode = <0x2>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <900000>;
};
};
vdd_cpu_l: DCDC_REG2 {
regulator-name = "vdd_cpu_l";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_ddr: DCDC_REG3 {
regulator-name = "vcc_ddr";
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc3v3_sys: DCDC_REG4 {
regulator-name = "vcc3v3_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-initial-mode = <0x2>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcc_buck5: DCDC_REG5 {
regulator-name = "vcc_buck5";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <2200000>;
regulator-max-microvolt = <2200000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <2200000>;
};
};
vcca_0v9: LDO_REG1 {
regulator-name = "vcca_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8: LDO_REG2 {
regulator-name = "vcc_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcc_0v9: LDO_REG3 {
regulator-name = "vcc_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <900000>;
};
};
vcca_1v8: LDO_REG4 {
regulator-name = "vcca_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1850000>;
regulator-max-microvolt = <1850000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
/*
* As per BSP, but schematic not showing any regulator
* pin for LD05.
*/
vdd1v5_dvp: LDO_REG5 {
regulator-name = "vdd1v5_dvp";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v5: LDO_REG6 {
regulator-name = "vcc_1v5";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_3v0: LDO_REG7 {
regulator-name = "vccio_3v0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd: LDO_REG8 {
regulator-name = "vccio_sd";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
/*
* As per BSP, but schematic not showing any regulator
* pin for LD09.
*/
vcc_sd: LDO_REG9 {
regulator-name = "vcc_sd";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc5v0_usb2: SWITCH_REG1 {
regulator-name = "vcc5v0_usb2";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <5000000>;
};
};
vccio_3v3: vcc_lan: SWITCH_REG2 {
regulator-name = "vccio_3v3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
&io_domains {
status = "okay";
bt656-supply = <&vcca_1v8>;
sdmmc-supply = <&vccio_sd>;
gpio1830-supply = <&vccio_3v0>;
};
&pmu_io_domains {
status = "okay";
pmu1830-supply = <&vcc_1v8>;
};
&sdhci {
bus-width = <8>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
non-removable;
status = "okay";
};
&tsadc {
status = "okay";
rockchip,hw-tshut-mode = <1>;
rockchip,hw-tshut-polarity = <1>;
};
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins =
<1 RK_PC2 0 &pcfg_pull_up>;
};
};
};
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