Commit 9a490b28 authored by Eddie James's avatar Eddie James Committed by Joel Stanley

ARM: dts: aspeed: Rainier: Fix PCA9552 on bus 8

The second presence detection PCA9552 was incorrectly added to bus 9.

Fixes: 8be44de6 ("ARM: dts: aspeed: Rainier: Add presence GPIOs")
Signed-off-by: default avatarEddie James <eajames@linux.ibm.com>
Reviewed-by: default avatarJoel Stanley <joel@jms.id.au>
Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
parent ee33e2fb
......@@ -1399,7 +1399,7 @@ eeprom@51 {
reg = <0x51>;
};
pca1: pca9552@61 {
pca_pres2: pca9552@61 {
compatible = "nxp,pca9552";
reg = <0x61>;
#address-cells = <1>;
......@@ -1407,6 +1407,15 @@ pca1: pca9552@61 {
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"SLOT6_PRSNT_EN_RSVD", "SLOT7_PRSNT_EN_RSVD",
"SLOT8_PRSNT_EN_RSVD", "SLOT9_PRSNT_EN_RSVD",
"SLOT10_PRSNT_EN_RSVD", "SLOT11_PRSNT_EN_RSVD",
"SLOT6_EXPANDER_PRSNT_N", "SLOT7_EXPANDER_PRSNT_N",
"SLOT8_EXPANDER_PRSNT_N", "SLOT9_EXPANDER_PRSNT_N",
"SLOT10_EXPANDER_PRSNT_N", "SLOT11_EXPANDER_PRSNT_N",
"", "", "", "";
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
......@@ -1507,104 +1516,6 @@ eeprom@50 {
compatible = "atmel,24c128";
reg = <0x50>;
};
pca_pres3: pca9552@61 {
compatible = "nxp,pca9552";
reg = <0x61>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"SLOT6_PRSNT_EN_RSVD", "SLOT7_PRSNT_EN_RSVD",
"SLOT8_PRSNT_EN_RSVD", "SLOT9_PRSNT_EN_RSVD",
"SLOT10_PRSNT_EN_RSVD", "SLOT11_PRSNT_EN_RSVD",
"SLOT6_EXPANDER_PRSNT_N", "SLOT7_EXPANDER_PRSNT_N",
"SLOT8_EXPANDER_PRSNT_N", "SLOT9_EXPANDER_PRSNT_N",
"SLOT10_EXPANDER_PRSNT_N", "SLOT11_EXPANDER_PRSNT_N",
"", "", "", "";
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@8 {
reg = <8>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@9 {
reg = <9>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@10 {
reg = <10>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@11 {
reg = <11>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@12 {
reg = <12>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@13 {
reg = <13>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@14 {
reg = <14>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@15 {
reg = <15>;
type = <PCA955X_TYPE_GPIO>;
};
};
};
&i2c10 {
......
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