Commit 9b81a8ce authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'davinci-for-v4.9/dts' of...

Merge tag 'davinci-for-v4.9/dts' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt

Pull "DaVinci DA850 device-tree enhancements include" from Sekhar Nori:

- Support for new board OMAP-L138 LCDK
- Add AEMIF node on DA850 EVM and use it for NAND
- Audio support for LCDK
- Cleanups for PWM and UART

* tag 'davinci-for-v4.9/dts' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: dts: da850-lcdk: Audio support via simple-card
  ARM: dts: da850,da850-evm: Add an aemif node and use it for the NAND
  ARM: dts: da850: Add basic DTS for the LCDK
  ARM: dts: da850: Add missing pin muxing for the UARTs
  ARM: dts: da850: Add new ECAP and EPWM bindings
parents aaf1edc2 9d05b389
...@@ -5,6 +5,10 @@ DA850/OMAP-L138/AM18x Evaluation Module (EVM) board ...@@ -5,6 +5,10 @@ DA850/OMAP-L138/AM18x Evaluation Module (EVM) board
Required root node properties: Required root node properties:
- compatible = "ti,da850-evm", "ti,da850"; - compatible = "ti,da850-evm", "ti,da850";
DA850/OMAP-L138/AM18x L138/C6748 Development Kit (LCDK) board
Required root node properties:
- compatible = "ti,da850-lcdk", "ti,da850";
EnBW AM1808 based CMC board EnBW AM1808 based CMC board
Required root node properties: Required root node properties:
- compatible = "enbw,cmc", "ti,da850; - compatible = "enbw,cmc", "ti,da850;
......
...@@ -120,6 +120,7 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \ ...@@ -120,6 +120,7 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \
dtb-$(CONFIG_ARCH_CLPS711X) += \ dtb-$(CONFIG_ARCH_CLPS711X) += \
ep7211-edb7211.dtb ep7211-edb7211.dtb
dtb-$(CONFIG_ARCH_DAVINCI) += \ dtb-$(CONFIG_ARCH_DAVINCI) += \
da850-lcdk.dtb \
da850-enbw-cmc.dtb \ da850-enbw-cmc.dtb \
da850-evm.dtb da850-evm.dtb
dtb-$(CONFIG_ARCH_DIGICOLOR) += \ dtb-$(CONFIG_ARCH_DIGICOLOR) += \
......
...@@ -29,6 +29,20 @@ mcasp0_pins: pinmux_mcasp0_pins { ...@@ -29,6 +29,20 @@ mcasp0_pins: pinmux_mcasp0_pins {
0x04 0x00011000 0x000ff000 0x04 0x00011000 0x000ff000
>; >;
}; };
nand_pins: nand_pins {
pinctrl-single,bits = <
/* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[4], EMA_CS[3] */
0x1c 0x10110110 0xf0ff0ff0
/*
* EMA_D[0], EMA_D[1], EMA_D[2],
* EMA_D[3], EMA_D[4], EMA_D[5],
* EMA_D[6], EMA_D[7]
*/
0x24 0x11111111 0xffffffff
/* EMA_A[1], EMA_A[2] */
0x30 0x01100000 0x0ff00000
>;
};
}; };
serial0: serial@42000 { serial0: serial@42000 {
status = "okay"; status = "okay";
...@@ -131,11 +145,6 @@ gpio: gpio@226000 { ...@@ -131,11 +145,6 @@ gpio: gpio@226000 {
status = "okay"; status = "okay";
}; };
}; };
nand_cs3@62000000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nand_cs3_pins>;
};
vbat: fixedregulator0 { vbat: fixedregulator0 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vbat"; regulator-name = "vbat";
...@@ -250,3 +259,33 @@ &edma0 { ...@@ -250,3 +259,33 @@ &edma0 {
&edma1 { &edma1 {
ti,edma-reserved-slot-ranges = <32 90>; ti,edma-reserved-slot-ranges = <32 90>;
}; };
&aemif {
pinctrl-names = "default";
pinctrl-0 = <&nand_pins>;
status = "ok";
cs3 {
#address-cells = <2>;
#size-cells = <1>;
clock-ranges;
ranges;
ti,cs-chipselect = <3>;
nand@2000000,0 {
compatible = "ti,davinci-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0 0x02000000 0x02000000
1 0x00000000 0x00008000>;
ti,davinci-chipselect = <1>;
ti,davinci-mask-ale = <0>;
ti,davinci-mask-cle = <0>;
ti,davinci-mask-chipsel = <0>;
ti,davinci-ecc-mode = "hw";
ti,davinci-ecc-bits = <4>;
ti,davinci-nand-use-bbt;
};
};
};
/*
* Copyright (c) 2016 BayLibre, Inc.
*
* Licensed under GPLv2.
*/
/dts-v1/;
#include "da850.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "DA850/AM1808/OMAP-L138 LCDK";
compatible = "ti,da850-lcdk", "ti,da850";
aliases {
serial2 = &serial2;
};
chosen {
stdout-path = "serial2:115200n8";
};
memory {
device_type = "memory";
reg = <0xc0000000 0x08000000>;
};
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "DA850/OMAP-L138 LCDK";
simple-audio-card,widgets =
"Line", "Line In",
"Line", "Line Out";
simple-audio-card,routing =
"LINE1L", "Line In",
"LINE1R", "Line In",
"Line Out", "LLOUT",
"Line Out", "RLOUT";
simple-audio-card,format = "dsp_b";
simple-audio-card,bitclock-master = <&link0_codec>;
simple-audio-card,frame-master = <&link0_codec>;
simple-audio-card,bitclock-inversion;
simple-audio-card,cpu {
sound-dai = <&mcasp0>;
system-clock-frequency = <24576000>;
};
link0_codec: simple-audio-card,codec {
sound-dai = <&tlv320aic3106>;
system-clock-frequency = <24576000>;
};
};
};
&pmx_core {
status = "okay";
mcasp0_pins: pinmux_mcasp0_pins {
pinctrl-single,bits = <
/* AHCLKX AFSX ACLKX */
0x00 0x00101010 0x00f0f0f0
/* ARX13 ARX14 */
0x04 0x00000110 0x00000ff0
>;
};
};
&serial2 {
pinctrl-names = "default";
pinctrl-0 = <&serial2_rxtx_pins>;
status = "okay";
};
&wdt {
status = "okay";
};
&rtc0 {
status = "okay";
};
&gpio {
status = "okay";
};
&mdio {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
bus_freq = <2200000>;
status = "okay";
};
&eth0 {
pinctrl-names = "default";
pinctrl-0 = <&mii_pins>;
status = "okay";
};
&mmc0 {
max-frequency = <50000000>;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
cd-gpios = <&gpio 64 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
clock-frequency = <100000>;
status = "okay";
tlv320aic3106: tlv320aic3106@18 {
#sound-dai-cells = <0>;
compatible = "ti,tlv320aic3106";
reg = <0x18>;
status = "okay";
};
};
&mcasp0 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mcasp0_pins>;
status = "okay";
op-mode = <0>; /* DAVINCI_MCASP_IIS_MODE */
tdm-slots = <2>;
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
0 0 0 0
0 0 0 0
0 0 0 0
0 1 2 0
>;
tx-num-evt = <32>;
rx-num-evt = <32>;
};
...@@ -41,20 +41,40 @@ pmx_core: pinmux@14120 { ...@@ -41,20 +41,40 @@ pmx_core: pinmux@14120 {
pinctrl-single,function-mask = <0xf>; pinctrl-single,function-mask = <0xf>;
status = "disabled"; status = "disabled";
nand_cs3_pins: pinmux_nand_pins { serial0_rtscts_pins: pinmux_serial0_rtscts_pins {
pinctrl-single,bits = < pinctrl-single,bits = <
/* EMA_OE, EMA_WE */ /* UART0_RTS UART0_CTS */
0x1c 0x00110000 0x00ff0000 0x0c 0x22000000 0xff000000
/* EMA_CS[4],EMA_CS[3]*/ >;
0x1c 0x00000110 0x00000ff0 };
/* serial0_rxtx_pins: pinmux_serial0_rxtx_pins {
* EMA_D[0], EMA_D[1], EMA_D[2], pinctrl-single,bits = <
* EMA_D[3], EMA_D[4], EMA_D[5], /* UART0_TXD UART0_RXD */
* EMA_D[6], EMA_D[7] 0x0c 0x00220000 0x00ff0000
*/ >;
0x24 0x11111111 0xffffffff };
/* EMA_A[1], EMA_A[2] */ serial1_rtscts_pins: pinmux_serial1_rtscts_pins {
0x30 0x01100000 0x0ff00000 pinctrl-single,bits = <
/* UART1_CTS UART1_RTS */
0x00 0x00440000 0x00ff0000
>;
};
serial1_rxtx_pins: pinmux_serial1_rxtx_pins {
pinctrl-single,bits = <
/* UART1_TXD UART1_RXD */
0x10 0x22000000 0xff000000
>;
};
serial2_rtscts_pins: pinmux_serial2_rtscts_pins {
pinctrl-single,bits = <
/* UART2_CTS UART2_RTS */
0x00 0x44000000 0xff000000
>;
};
serial2_rxtx_pins: pinmux_serial2_rxtx_pins {
pinctrl-single,bits = <
/* UART2_TXD UART2_RXD */
0x10 0x00220000 0x00ff0000
>; >;
}; };
i2c0_pins: pinmux_i2c0_pins { i2c0_pins: pinmux_i2c0_pins {
...@@ -274,31 +294,36 @@ mmc1: mmc@21b000 { ...@@ -274,31 +294,36 @@ mmc1: mmc@21b000 {
status = "disabled"; status = "disabled";
}; };
ehrpwm0: pwm@300000 { ehrpwm0: pwm@300000 {
compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
"ti,am33xx-ehrpwm";
#pwm-cells = <3>; #pwm-cells = <3>;
reg = <0x300000 0x2000>; reg = <0x300000 0x2000>;
status = "disabled"; status = "disabled";
}; };
ehrpwm1: pwm@302000 { ehrpwm1: pwm@302000 {
compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
"ti,am33xx-ehrpwm";
#pwm-cells = <3>; #pwm-cells = <3>;
reg = <0x302000 0x2000>; reg = <0x302000 0x2000>;
status = "disabled"; status = "disabled";
}; };
ecap0: ecap@306000 { ecap0: ecap@306000 {
compatible = "ti,da850-ecap", "ti,am33xx-ecap"; compatible = "ti,da850-ecap", "ti,am3352-ecap",
"ti,am33xx-ecap";
#pwm-cells = <3>; #pwm-cells = <3>;
reg = <0x306000 0x80>; reg = <0x306000 0x80>;
status = "disabled"; status = "disabled";
}; };
ecap1: ecap@307000 { ecap1: ecap@307000 {
compatible = "ti,da850-ecap", "ti,am33xx-ecap"; compatible = "ti,da850-ecap", "ti,am3352-ecap",
"ti,am33xx-ecap";
#pwm-cells = <3>; #pwm-cells = <3>;
reg = <0x307000 0x80>; reg = <0x307000 0x80>;
status = "disabled"; status = "disabled";
}; };
ecap2: ecap@308000 { ecap2: ecap@308000 {
compatible = "ti,da850-ecap", "ti,am33xx-ecap"; compatible = "ti,da850-ecap", "ti,am3352-ecap",
"ti,am33xx-ecap";
#pwm-cells = <3>; #pwm-cells = <3>;
reg = <0x308000 0x80>; reg = <0x308000 0x80>;
status = "disabled"; status = "disabled";
...@@ -375,17 +400,14 @@ mcasp0: mcasp@100000 { ...@@ -375,17 +400,14 @@ mcasp0: mcasp@100000 {
dma-names = "tx", "rx"; dma-names = "tx", "rx";
}; };
}; };
nand_cs3@62000000 { aemif: aemif@68000000 {
compatible = "ti,davinci-nand"; compatible = "ti,da850-aemif";
reg = <0x62000000 0x807ff #address-cells = <2>;
0x68000000 0x8000>; #size-cells = <1>;
ti,davinci-chipselect = <1>;
ti,davinci-mask-ale = <0>; reg = <0x68000000 0x00008000>;
ti,davinci-mask-cle = <0>; ranges = <0 0 0x60000000 0x08000000
ti,davinci-mask-chipsel = <0>; 1 0 0x68000000 0x00008000>;
ti,davinci-ecc-mode = "hw";
ti,davinci-ecc-bits = <4>;
ti,davinci-nand-use-bbt;
status = "disabled"; status = "disabled";
}; };
}; };
...@@ -49,6 +49,7 @@ static void __init da850_init_machine(void) ...@@ -49,6 +49,7 @@ static void __init da850_init_machine(void)
static const char *const da850_boards_compat[] __initconst = { static const char *const da850_boards_compat[] __initconst = {
"enbw,cmc", "enbw,cmc",
"ti,da850-lcdk",
"ti,da850-evm", "ti,da850-evm",
"ti,da850", "ti,da850",
NULL, NULL,
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment