Commit 9bc47f11 authored by David Hildenbrand's avatar David Hildenbrand Committed by Andrew Morton

m68k/mm: use correct bit number in _PAGE_SWP_EXCLUSIVE comment

As noticed by Geert, commit b5c88f21 ("microblaze/mm: support
__HAVE_ARCH_PTE_SWP_EXCLUSIVE") modified m68k code by accident.  While
replacing 0x080 by CF_PAGE_NOCACHE is correct, although it should have
been part of commit ed415406 ("m68k/mm: support
__HAVE_ARCH_PTE_SWP_EXCLUSIVE"), replacing "bit 7" by "bit 24" in the
comment was wrong.

Let's revert to the previous, correct, comment.

Link: https://lkml.kernel.org/r/20230404085636.121409-1-david@redhat.comSigned-off-by: default avatarDavid Hildenbrand <david@redhat.com>
Reported-by: default avatarGeert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
parent 92d5df38
...@@ -46,7 +46,7 @@ ...@@ -46,7 +46,7 @@
#define _CACHEMASK040 (~0x060) #define _CACHEMASK040 (~0x060)
#define _PAGE_GLOBAL040 0x400 /* 68040 global bit, used for kva descs */ #define _PAGE_GLOBAL040 0x400 /* 68040 global bit, used for kva descs */
/* We borrow bit 24 to store the exclusive marker in swap PTEs. */ /* We borrow bit 7 to store the exclusive marker in swap PTEs. */
#define _PAGE_SWP_EXCLUSIVE CF_PAGE_NOCACHE #define _PAGE_SWP_EXCLUSIVE CF_PAGE_NOCACHE
/* /*
......
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