Commit 9bd9a063 authored by Ard Biesheuvel's avatar Ard Biesheuvel Committed by Arnd Bergmann

dt: amd-seattle: upgrade AMD Seattle XGBE to new SMMU binding

Upgrade the DT descriptions of the AMD Seattle XGBE network
controllers to use the current SMMU bindings.
Signed-off-by: default avatarArd Biesheuvel <ardb@kernel.org>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent f179eb6b
...@@ -55,7 +55,7 @@ xgmac0: xgmac@e0700000 { ...@@ -55,7 +55,7 @@ xgmac0: xgmac@e0700000 {
clocks = <&xgmacclk0_dma_250mhz>, <&xgmacclk0_ptp_250mhz>; clocks = <&xgmacclk0_dma_250mhz>, <&xgmacclk0_ptp_250mhz>;
clock-names = "dma_clk", "ptp_clk"; clock-names = "dma_clk", "ptp_clk";
phy-mode = "xgmii"; phy-mode = "xgmii";
#stream-id-cells = <16>; iommus = <&xgmac0_smmu 0x00 0x17>; /* 0-7, 16-23 */
dma-coherent; dma-coherent;
}; };
...@@ -81,11 +81,11 @@ xgmac1: xgmac@e0900000 { ...@@ -81,11 +81,11 @@ xgmac1: xgmac@e0900000 {
clocks = <&xgmacclk1_dma_250mhz>, <&xgmacclk1_ptp_250mhz>; clocks = <&xgmacclk1_dma_250mhz>, <&xgmacclk1_ptp_250mhz>;
clock-names = "dma_clk", "ptp_clk"; clock-names = "dma_clk", "ptp_clk";
phy-mode = "xgmii"; phy-mode = "xgmii";
#stream-id-cells = <16>; iommus = <&xgmac1_smmu 0x00 0x17>; /* 0-7, 16-23 */
dma-coherent; dma-coherent;
}; };
xgmac0_smmu: smmu@e0600000 { xgmac0_smmu: iommu@e0600000 {
compatible = "arm,mmu-401"; compatible = "arm,mmu-401";
reg = <0 0xe0600000 0 0x10000>; reg = <0 0xe0600000 0 0x10000>;
#global-interrupts = <1>; #global-interrupts = <1>;
...@@ -94,14 +94,11 @@ xgmac0_smmu: smmu@e0600000 { ...@@ -94,14 +94,11 @@ xgmac0_smmu: smmu@e0600000 {
*/ */
<0 336 4>, <0 336 4>,
<0 336 4>; <0 336 4>;
#iommu-cells = <2>;
mmu-masters = <&xgmac0 dma-coherent;
0 1 2 3 4 5 6 7
16 17 18 19 20 21 22 23
>;
}; };
xgmac1_smmu: smmu@e0800000 { xgmac1_smmu: iommu@e0800000 {
compatible = "arm,mmu-401"; compatible = "arm,mmu-401";
reg = <0 0xe0800000 0 0x10000>; reg = <0 0xe0800000 0 0x10000>;
#global-interrupts = <1>; #global-interrupts = <1>;
...@@ -110,9 +107,6 @@ xgmac1_smmu: smmu@e0800000 { ...@@ -110,9 +107,6 @@ xgmac1_smmu: smmu@e0800000 {
*/ */
<0 335 4>, <0 335 4>,
<0 335 4>; <0 335 4>;
#iommu-cells = <2>;
mmu-masters = <&xgmac1 dma-coherent;
0 1 2 3 4 5 6 7
16 17 18 19 20 21 22 23
>;
}; };
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