Commit 9bdc2e0c authored by Viresh Kumar's avatar Viresh Kumar

ARM/cns3xxx/timer: Migrate to new 'set-state' interface

Migrate cns3xxx driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

NOTE: We don't read TIMER1_2_CONTROL_OFFSET register on shutdown
anymore.
Acked-by: default avatarKrzysztof Hałasa <khalasa@piap.pl>
Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
parent 5e253571
...@@ -113,30 +113,33 @@ void cns3xxx_power_off(void) ...@@ -113,30 +113,33 @@ void cns3xxx_power_off(void)
*/ */
static void __iomem *cns3xxx_tmr1; static void __iomem *cns3xxx_tmr1;
static void cns3xxx_timer_set_mode(enum clock_event_mode mode, static int cns3xxx_shutdown(struct clock_event_device *clk)
struct clock_event_device *clk) {
writel(0, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
return 0;
}
static int cns3xxx_set_oneshot(struct clock_event_device *clk)
{
unsigned long ctrl = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
/* period set, and timer enabled in 'next_event' hook */
ctrl |= (1 << 2) | (1 << 9);
writel(ctrl, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
return 0;
}
static int cns3xxx_set_periodic(struct clock_event_device *clk)
{ {
unsigned long ctrl = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); unsigned long ctrl = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
int pclk = cns3xxx_cpu_clock() / 8; int pclk = cns3xxx_cpu_clock() / 8;
int reload; int reload;
switch (mode) { reload = pclk * 20 / (3 * HZ) * 0x25000;
case CLOCK_EVT_MODE_PERIODIC: writel(reload, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET);
reload = pclk * 20 / (3 * HZ) * 0x25000; ctrl |= (1 << 0) | (1 << 2) | (1 << 9);
writel(reload, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET);
ctrl |= (1 << 0) | (1 << 2) | (1 << 9);
break;
case CLOCK_EVT_MODE_ONESHOT:
/* period set, and timer enabled in 'next_event' hook */
ctrl |= (1 << 2) | (1 << 9);
break;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
default:
ctrl = 0;
}
writel(ctrl, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); writel(ctrl, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
return 0;
} }
static int cns3xxx_timer_set_next_event(unsigned long evt, static int cns3xxx_timer_set_next_event(unsigned long evt,
...@@ -151,12 +154,16 @@ static int cns3xxx_timer_set_next_event(unsigned long evt, ...@@ -151,12 +154,16 @@ static int cns3xxx_timer_set_next_event(unsigned long evt,
} }
static struct clock_event_device cns3xxx_tmr1_clockevent = { static struct clock_event_device cns3xxx_tmr1_clockevent = {
.name = "cns3xxx timer1", .name = "cns3xxx timer1",
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, .features = CLOCK_EVT_FEAT_PERIODIC |
.set_mode = cns3xxx_timer_set_mode, CLOCK_EVT_FEAT_ONESHOT,
.set_next_event = cns3xxx_timer_set_next_event, .set_state_shutdown = cns3xxx_shutdown,
.rating = 350, .set_state_periodic = cns3xxx_set_periodic,
.cpumask = cpu_all_mask, .set_state_oneshot = cns3xxx_set_oneshot,
.tick_resume = cns3xxx_shutdown,
.set_next_event = cns3xxx_timer_set_next_event,
.rating = 350,
.cpumask = cpu_all_mask,
}; };
static void __init cns3xxx_clockevents_init(unsigned int timer_irq) static void __init cns3xxx_clockevents_init(unsigned int timer_irq)
......
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