Commit 9c7e355c authored by Mohan Kumar's avatar Mohan Kumar Committed by Vinod Koul

dmaengine: tegra210-adma: fix global intr clear

The current global interrupt clear programming register offset
was not correct. Fix the programming with right offset

Fixes: ded1f3db ("dmaengine: tegra210-adma: prepare for supporting newer Tegra chips")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarMohan Kumar <mkumard@nvidia.com>
Link: https://lore.kernel.org/r/20230102064844.31306-1-mkumard@nvidia.comSigned-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 57054fe5
...@@ -221,7 +221,7 @@ static int tegra_adma_init(struct tegra_adma *tdma) ...@@ -221,7 +221,7 @@ static int tegra_adma_init(struct tegra_adma *tdma)
int ret; int ret;
/* Clear any interrupts */ /* Clear any interrupts */
tdma_write(tdma, tdma->cdata->global_int_clear, 0x1); tdma_write(tdma, tdma->cdata->ch_base_offset + tdma->cdata->global_int_clear, 0x1);
/* Assert soft reset */ /* Assert soft reset */
tdma_write(tdma, ADMA_GLOBAL_SOFT_RESET, 0x1); tdma_write(tdma, ADMA_GLOBAL_SOFT_RESET, 0x1);
......
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