Commit 9d692863 authored by Michael Turquette's avatar Michael Turquette

Merge tag 'sunxi-clk-fixes-for-4.7' of...

Merge tag 'sunxi-clk-fixes-for-4.7' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-fixes

Allwinner clock fixes for 4.7

A bunch of changes for the display clocks merged in 4.7
parents 08634770 9ca91a65
...@@ -33,6 +33,8 @@ struct sun4i_a10_display_clk_data { ...@@ -33,6 +33,8 @@ struct sun4i_a10_display_clk_data {
u8 width_div; u8 width_div;
u8 width_mux; u8 width_mux;
u32 flags;
}; };
struct reset_data { struct reset_data {
...@@ -166,7 +168,7 @@ static void __init sun4i_a10_display_init(struct device_node *node, ...@@ -166,7 +168,7 @@ static void __init sun4i_a10_display_init(struct device_node *node,
data->has_div ? &div->hw : NULL, data->has_div ? &div->hw : NULL,
data->has_div ? &clk_divider_ops : NULL, data->has_div ? &clk_divider_ops : NULL,
&gate->hw, &clk_gate_ops, &gate->hw, &clk_gate_ops,
0); data->flags);
if (IS_ERR(clk)) { if (IS_ERR(clk)) {
pr_err("%s: Couldn't register the clock\n", clk_name); pr_err("%s: Couldn't register the clock\n", clk_name);
goto free_div; goto free_div;
...@@ -232,6 +234,7 @@ static const struct sun4i_a10_display_clk_data sun4i_a10_tcon_ch0_data __initcon ...@@ -232,6 +234,7 @@ static const struct sun4i_a10_display_clk_data sun4i_a10_tcon_ch0_data __initcon
.offset_rst = 29, .offset_rst = 29,
.offset_mux = 24, .offset_mux = 24,
.width_mux = 2, .width_mux = 2,
.flags = CLK_SET_RATE_PARENT,
}; };
static void __init sun4i_a10_tcon_ch0_setup(struct device_node *node) static void __init sun4i_a10_tcon_ch0_setup(struct device_node *node)
......
...@@ -79,15 +79,11 @@ static int tcon_ch1_is_enabled(struct clk_hw *hw) ...@@ -79,15 +79,11 @@ static int tcon_ch1_is_enabled(struct clk_hw *hw)
static u8 tcon_ch1_get_parent(struct clk_hw *hw) static u8 tcon_ch1_get_parent(struct clk_hw *hw)
{ {
struct tcon_ch1_clk *tclk = hw_to_tclk(hw); struct tcon_ch1_clk *tclk = hw_to_tclk(hw);
int num_parents = clk_hw_get_num_parents(hw);
u32 reg; u32 reg;
reg = readl(tclk->reg) >> TCON_CH1_SCLK2_MUX_SHIFT; reg = readl(tclk->reg) >> TCON_CH1_SCLK2_MUX_SHIFT;
reg &= reg >> TCON_CH1_SCLK2_MUX_MASK; reg &= reg >> TCON_CH1_SCLK2_MUX_MASK;
if (reg >= num_parents)
return -EINVAL;
return reg; return reg;
} }
......
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