Commit 9d8d5a39 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin
parent e91eec91
...@@ -1293,9 +1293,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, ...@@ -1293,9 +1293,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_DP20(dev_priv) (IS_DG2(dev_priv)) #define HAS_DP20(dev_priv) (IS_DG2(dev_priv))
#define HAS_CDCLK_CRAWL(dev_priv) (INTEL_INFO(dev_priv)->display.has_cdclk_crawl) #define HAS_CDCLK_CRAWL(dev_priv) (INTEL_INFO(dev_priv)->display.has_cdclk_crawl)
#define HAS_DDI(dev_priv) (DISPLAY_VER(dev_priv) >= 9 || \ #define HAS_DDI(dev_priv) (INTEL_INFO(dev_priv)->display.has_ddi)
IS_BROADWELL(dev_priv) || \
IS_HASWELL(dev_priv))
#define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg) #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
#define HAS_PSR(dev_priv) (INTEL_INFO(dev_priv)->display.has_psr) #define HAS_PSR(dev_priv) (INTEL_INFO(dev_priv)->display.has_psr)
#define HAS_PSR_HW_TRACKING(dev_priv) \ #define HAS_PSR_HW_TRACKING(dev_priv) \
......
...@@ -535,6 +535,7 @@ static const struct intel_device_info vlv_info = { ...@@ -535,6 +535,7 @@ static const struct intel_device_info vlv_info = {
.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \ .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \ .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \ BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
.display.has_ddi = 1, \
.display.has_fpga_dbg = 1, \ .display.has_fpga_dbg = 1, \
.display.has_dp_mst = 1, \ .display.has_dp_mst = 1, \
.has_rc6p = 0 /* RC6p removed-by HSW */, \ .has_rc6p = 0 /* RC6p removed-by HSW */, \
...@@ -682,6 +683,7 @@ static const struct intel_device_info skl_gt4_info = { ...@@ -682,6 +683,7 @@ static const struct intel_device_info skl_gt4_info = {
BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \ BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \ BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \
.has_64bit_reloc = 1, \ .has_64bit_reloc = 1, \
.display.has_ddi = 1, \
.display.has_fpga_dbg = 1, \ .display.has_fpga_dbg = 1, \
.display.fbc_mask = BIT(INTEL_FBC_A), \ .display.fbc_mask = BIT(INTEL_FBC_A), \
.display.has_hdcp = 1, \ .display.has_hdcp = 1, \
...@@ -930,6 +932,7 @@ static const struct intel_device_info adl_s_info = { ...@@ -930,6 +932,7 @@ static const struct intel_device_info adl_s_info = {
.dbuf.size = 4096, \ .dbuf.size = 4096, \
.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | \ .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | \
BIT(DBUF_S4), \ BIT(DBUF_S4), \
.display.has_ddi = 1, \
.display.has_dmc = 1, \ .display.has_dmc = 1, \
.display.has_dp_mst = 1, \ .display.has_dp_mst = 1, \
.display.has_dsb = 1, \ .display.has_dsb = 1, \
......
...@@ -163,6 +163,7 @@ enum intel_ppgtt_type { ...@@ -163,6 +163,7 @@ enum intel_ppgtt_type {
func(cursor_needs_physical); \ func(cursor_needs_physical); \
func(has_cdclk_crawl); \ func(has_cdclk_crawl); \
func(has_dmc); \ func(has_dmc); \
func(has_ddi); \
func(has_dp_mst); \ func(has_dp_mst); \
func(has_dsb); \ func(has_dsb); \
func(has_dsc); \ func(has_dsc); \
......
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