Commit 9e2aee80 authored by Rob Herring's avatar Rob Herring Committed by Lorenzo Pieralisi

PCI: Move private DT related functions into private header

The functions in linux/of_pci.h are primarily used by host bridge
drivers, so they can be private to drivers/pci/.

The remaining functions are still used mostly in host bridge drivers
that still live in arch specific code. Hopefully someday, those will get
moved into drivers/pci as well.
Signed-off-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Acked-by: default avatarJingoo Han <jingoohan1@gmail.com>
parent a5aa35cd
...@@ -27,6 +27,7 @@ ...@@ -27,6 +27,7 @@
#include <linux/mfd/syscon.h> #include <linux/mfd/syscon.h>
#include <linux/regmap.h> #include <linux/regmap.h>
#include "../pci.h"
#include "pcie-designware.h" #include "pcie-designware.h"
/* PCIe controller wrapper DRA7XX configuration registers */ /* PCIe controller wrapper DRA7XX configuration registers */
......
...@@ -15,6 +15,7 @@ ...@@ -15,6 +15,7 @@
#include <linux/pci_regs.h> #include <linux/pci_regs.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include "../pci.h"
#include "pcie-designware.h" #include "pcie-designware.h"
static struct pci_ops dw_pcie_ops; static struct pci_ops dw_pcie_ops;
......
...@@ -19,6 +19,8 @@ ...@@ -19,6 +19,8 @@
#include <linux/of_address.h> #include <linux/of_address.h>
#include <linux/of_pci.h> #include <linux/of_pci.h>
#include "../pci.h"
/* PCIe core registers */ /* PCIe core registers */
#define PCIE_CORE_CMD_STATUS_REG 0x4 #define PCIE_CORE_CMD_STATUS_REG 0x4
#define PCIE_CORE_CMD_IO_ACCESS_EN BIT(0) #define PCIE_CORE_CMD_IO_ACCESS_EN BIT(0)
......
...@@ -28,6 +28,8 @@ ...@@ -28,6 +28,8 @@
#include <linux/irq.h> #include <linux/irq.h>
#include <linux/clk.h> #include <linux/clk.h>
#include "../pci.h"
/* /*
* Special configuration registers directly in the first few words * Special configuration registers directly in the first few words
* in I/O space. * in I/O space.
......
...@@ -21,6 +21,8 @@ ...@@ -21,6 +21,8 @@
#include <linux/of_pci.h> #include <linux/of_pci.h>
#include <linux/of_platform.h> #include <linux/of_platform.h>
#include "../pci.h"
/* /*
* PCIe unit register offsets. * PCIe unit register offsets.
*/ */
......
...@@ -21,6 +21,8 @@ ...@@ -21,6 +21,8 @@
#include <linux/sizes.h> #include <linux/sizes.h>
#include <linux/slab.h> #include <linux/slab.h>
#include "../pci.h"
/* AHB-PCI Bridge PCI communication registers */ /* AHB-PCI Bridge PCI communication registers */
#define RCAR_AHBPCI_PCICOM_OFFSET 0x800 #define RCAR_AHBPCI_PCICOM_OFFSET 0x800
......
...@@ -40,6 +40,8 @@ ...@@ -40,6 +40,8 @@
#include <soc/tegra/cpuidle.h> #include <soc/tegra/cpuidle.h>
#include <soc/tegra/pmc.h> #include <soc/tegra/pmc.h>
#include "../pci.h"
#define INT_PCI_MSI_NR (8 * 32) #define INT_PCI_MSI_NR (8 * 32)
/* register definitions */ /* register definitions */
......
...@@ -33,6 +33,8 @@ ...@@ -33,6 +33,8 @@
#include <linux/regmap.h> #include <linux/regmap.h>
#include <linux/clk.h> #include <linux/clk.h>
#include "../pci.h"
#define V3_PCI_VENDOR 0x00000000 #define V3_PCI_VENDOR 0x00000000
#define V3_PCI_DEVICE 0x00000002 #define V3_PCI_DEVICE 0x00000002
#define V3_PCI_CMD 0x00000004 #define V3_PCI_CMD 0x00000004
......
...@@ -22,6 +22,8 @@ ...@@ -22,6 +22,8 @@
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/slab.h> #include <linux/slab.h>
#include "../pci.h"
#define PCIECORE_CTLANDSTATUS 0x50 #define PCIECORE_CTLANDSTATUS 0x50
#define PIM1_1L 0x80 #define PIM1_1L 0x80
#define IBAR2 0x98 #define IBAR2 0x98
......
...@@ -17,6 +17,8 @@ ...@@ -17,6 +17,8 @@
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/slab.h> #include <linux/slab.h>
#include "../pci.h"
#define RP_TX_REG0 0x2000 #define RP_TX_REG0 0x2000
#define RP_TX_REG1 0x2004 #define RP_TX_REG1 0x2004
#define RP_TX_CNTRL 0x2008 #define RP_TX_CNTRL 0x2008
......
...@@ -16,6 +16,7 @@ ...@@ -16,6 +16,7 @@
#include <linux/of_platform.h> #include <linux/of_platform.h>
#include <linux/phy/phy.h> #include <linux/phy/phy.h>
#include "../pci.h"
#include "pcie-iproc.h" #include "pcie-iproc.h"
static const struct of_device_id iproc_pcie_of_match_table[] = { static const struct of_device_id iproc_pcie_of_match_table[] = {
......
...@@ -22,6 +22,8 @@ ...@@ -22,6 +22,8 @@
#include <linux/pm_runtime.h> #include <linux/pm_runtime.h>
#include <linux/reset.h> #include <linux/reset.h>
#include "../pci.h"
/* PCIe shared registers */ /* PCIe shared registers */
#define PCIE_SYS_CFG 0x00 #define PCIE_SYS_CFG 0x00
#define PCIE_INT_ENABLE 0x0c #define PCIE_INT_ENABLE 0x0c
......
...@@ -28,6 +28,8 @@ ...@@ -28,6 +28,8 @@
#include <linux/pm_runtime.h> #include <linux/pm_runtime.h>
#include <linux/slab.h> #include <linux/slab.h>
#include "../pci.h"
#define PCIECAR 0x000010 #define PCIECAR 0x000010
#define PCIECCTLR 0x000018 #define PCIECCTLR 0x000018
#define CONFIG_SEND_ENABLE (1 << 31) #define CONFIG_SEND_ENABLE (1 << 31)
......
...@@ -36,6 +36,8 @@ ...@@ -36,6 +36,8 @@
#include <linux/reset.h> #include <linux/reset.h>
#include <linux/regmap.h> #include <linux/regmap.h>
#include "../pci.h"
/* /*
* The upper 16 bits of PCIE_CLIENT_CONFIG are a write mask for the lower 16 * The upper 16 bits of PCIE_CLIENT_CONFIG are a write mask for the lower 16
* bits. This allows atomic updates of the register without locking. * bits. This allows atomic updates of the register without locking.
......
...@@ -21,6 +21,8 @@ ...@@ -21,6 +21,8 @@
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/irqchip/chained_irq.h> #include <linux/irqchip/chained_irq.h>
#include "../pci.h"
/* Bridge core config registers */ /* Bridge core config registers */
#define BRCFG_PCIE_RX0 0x00000000 #define BRCFG_PCIE_RX0 0x00000000
#define BRCFG_INTERRUPT 0x00000010 #define BRCFG_INTERRUPT 0x00000010
......
...@@ -23,6 +23,8 @@ ...@@ -23,6 +23,8 @@
#include <linux/pci.h> #include <linux/pci.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include "../pci.h"
/* Register definitions */ /* Register definitions */
#define XILINX_PCIE_REG_BIR 0x00000130 #define XILINX_PCIE_REG_BIR 0x00000130
#define XILINX_PCIE_REG_IDR 0x00000138 #define XILINX_PCIE_REG_IDR 0x00000138
......
...@@ -407,4 +407,44 @@ static inline u64 pci_rebar_size_to_bytes(int size) ...@@ -407,4 +407,44 @@ static inline u64 pci_rebar_size_to_bytes(int size)
return 1ULL << (size + 20); return 1ULL << (size + 20);
} }
struct device_node;
#ifdef CONFIG_OF
int of_pci_parse_bus_range(struct device_node *node, struct resource *res);
int of_get_pci_domain_nr(struct device_node *node);
int of_pci_get_max_link_speed(struct device_node *node);
#else
static inline int
of_pci_parse_bus_range(struct device_node *node, struct resource *res)
{
return -EINVAL;
}
static inline int
of_get_pci_domain_nr(struct device_node *node)
{
return -1;
}
static inline int
of_pci_get_max_link_speed(struct device_node *node)
{
return -EINVAL;
}
#endif /* CONFIG_OF */
#if defined(CONFIG_OF_ADDRESS)
int of_pci_get_host_bridge_resources(struct device_node *dev,
unsigned char busno, unsigned char bus_max,
struct list_head *resources, resource_size_t *io_base);
#else
static inline int of_pci_get_host_bridge_resources(struct device_node *dev,
unsigned char busno, unsigned char bus_max,
struct list_head *resources, resource_size_t *io_base)
{
return -EINVAL;
}
#endif
#endif /* DRIVERS_PCI_H */ #endif /* DRIVERS_PCI_H */
...@@ -13,9 +13,6 @@ struct device_node; ...@@ -13,9 +13,6 @@ struct device_node;
struct device_node *of_pci_find_child_device(struct device_node *parent, struct device_node *of_pci_find_child_device(struct device_node *parent,
unsigned int devfn); unsigned int devfn);
int of_pci_get_devfn(struct device_node *np); int of_pci_get_devfn(struct device_node *np);
int of_pci_parse_bus_range(struct device_node *node, struct resource *res);
int of_get_pci_domain_nr(struct device_node *node);
int of_pci_get_max_link_speed(struct device_node *node);
void of_pci_check_probe_only(void); void of_pci_check_probe_only(void);
int of_pci_map_rid(struct device_node *np, u32 rid, int of_pci_map_rid(struct device_node *np, u32 rid,
const char *map_name, const char *map_mask_name, const char *map_name, const char *map_mask_name,
...@@ -32,18 +29,6 @@ static inline int of_pci_get_devfn(struct device_node *np) ...@@ -32,18 +29,6 @@ static inline int of_pci_get_devfn(struct device_node *np)
return -EINVAL; return -EINVAL;
} }
static inline int
of_pci_parse_bus_range(struct device_node *node, struct resource *res)
{
return -EINVAL;
}
static inline int
of_get_pci_domain_nr(struct device_node *node)
{
return -1;
}
static inline int of_pci_map_rid(struct device_node *np, u32 rid, static inline int of_pci_map_rid(struct device_node *np, u32 rid,
const char *map_name, const char *map_mask_name, const char *map_name, const char *map_mask_name,
struct device_node **target, u32 *id_out) struct device_node **target, u32 *id_out)
...@@ -51,12 +36,6 @@ static inline int of_pci_map_rid(struct device_node *np, u32 rid, ...@@ -51,12 +36,6 @@ static inline int of_pci_map_rid(struct device_node *np, u32 rid,
return -EINVAL; return -EINVAL;
} }
static inline int
of_pci_get_max_link_speed(struct device_node *node)
{
return -EINVAL;
}
static inline void of_pci_check_probe_only(void) { } static inline void of_pci_check_probe_only(void) { }
#endif #endif
...@@ -70,17 +49,4 @@ of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin) ...@@ -70,17 +49,4 @@ of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin)
} }
#endif #endif
#if defined(CONFIG_OF_ADDRESS)
int of_pci_get_host_bridge_resources(struct device_node *dev,
unsigned char busno, unsigned char bus_max,
struct list_head *resources, resource_size_t *io_base);
#else
static inline int of_pci_get_host_bridge_resources(struct device_node *dev,
unsigned char busno, unsigned char bus_max,
struct list_head *resources, resource_size_t *io_base)
{
return -EINVAL;
}
#endif
#endif #endif
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