Commit 9ef1af9e authored by Stephen Warren's avatar Stephen Warren Committed by Arnd Bergmann

dt: tegra: remove non-existent clock IDs

The Tegra124 clock DT binding currently provides 3 clocks that don't
actually exist; 2 for NAND and one for UART5/UARTE. Delete these. While
this is technically an incompatible DT ABI change, nothing could have
used these clock IDs for anything practical, since the HW doesn't exist.

Cc: <stable@vger.kernel.org>
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 9ba71705
...@@ -29,7 +29,7 @@ ...@@ -29,7 +29,7 @@
/* 10 (register bit affects spdif_in and spdif_out) */ /* 10 (register bit affects spdif_in and spdif_out) */
#define TEGRA124_CLK_I2S1 11 #define TEGRA124_CLK_I2S1 11
#define TEGRA124_CLK_I2C1 12 #define TEGRA124_CLK_I2C1 12
#define TEGRA124_CLK_NDFLASH 13 /* 13 */
#define TEGRA124_CLK_SDMMC1 14 #define TEGRA124_CLK_SDMMC1 14
#define TEGRA124_CLK_SDMMC4 15 #define TEGRA124_CLK_SDMMC4 15
/* 16 */ /* 16 */
...@@ -83,7 +83,7 @@ ...@@ -83,7 +83,7 @@
/* 64 */ /* 64 */
#define TEGRA124_CLK_UARTD 65 #define TEGRA124_CLK_UARTD 65
#define TEGRA124_CLK_UARTE 66 /* 66 */
#define TEGRA124_CLK_I2C3 67 #define TEGRA124_CLK_I2C3 67
#define TEGRA124_CLK_SBC4 68 #define TEGRA124_CLK_SBC4 68
#define TEGRA124_CLK_SDMMC3 69 #define TEGRA124_CLK_SDMMC3 69
...@@ -97,7 +97,7 @@ ...@@ -97,7 +97,7 @@
#define TEGRA124_CLK_TRACE 77 #define TEGRA124_CLK_TRACE 77
#define TEGRA124_CLK_SOC_THERM 78 #define TEGRA124_CLK_SOC_THERM 78
#define TEGRA124_CLK_DTV 79 #define TEGRA124_CLK_DTV 79
#define TEGRA124_CLK_NDSPEED 80 /* 80 */
#define TEGRA124_CLK_I2CSLOW 81 #define TEGRA124_CLK_I2CSLOW 81
#define TEGRA124_CLK_DSIB 82 #define TEGRA124_CLK_DSIB 82
#define TEGRA124_CLK_TSEC 83 #define TEGRA124_CLK_TSEC 83
......
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