Commit 9f5ce88d authored by Zhou Wang's avatar Zhou Wang Committed by Wei Xu

arm64: dts: hisi: add PCIe host controller node for hip07 SoC

Add one PCIe host controller node for HiSilicon Hip07 SoC and enable it in
D05 board.
Signed-off-by: default avatarZhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: default avatarWei Xu <xuwei5@hisilicon.com>
parent 5771a8c0
...@@ -84,3 +84,7 @@ &eth3 { ...@@ -84,3 +84,7 @@ &eth3 {
&sas1 { &sas1 {
status = "ok"; status = "ok";
}; };
&p0_pcie2_a {
status = "ok";
};
...@@ -1534,5 +1534,27 @@ sas2: sas@a3000000 { ...@@ -1534,5 +1534,27 @@ sas2: sas@a3000000 {
<637 1>,<638 1>,<639 1>; <637 1>,<638 1>,<639 1>;
status = "disabled"; status = "disabled";
}; };
p0_pcie2_a: pcie@a00a0000 {
compatible = "hisilicon,hip07-pcie-ecam";
reg = <0 0xaf800000 0 0x800000>,
<0 0xa00a0000 0 0x10000>;
bus-range = <0xf8 0xff>;
msi-map = <0xf800 &p0_its_dsa_a 0xf800 0x800>;
msi-map-mask = <0xffff>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
dma-coherent;
ranges = <0x02000000 0 0xa8000000 0 0xa8000000 0 0x77f0000
0x01000000 0 0 0 0xaf7f0000 0 0x10000>;
#interrupt-cells = <1>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <0x0 0 0 1 &mbigen_pcie2_a 671 4
0x0 0 0 2 &mbigen_pcie2_a 671 4
0x0 0 0 3 &mbigen_pcie2_a 671 4
0x0 0 0 4 &mbigen_pcie2_a 671 4>;
status = "disabled";
};
}; };
}; };
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