Commit 9f757942 authored by Jagadeesh Kona's avatar Jagadeesh Kona Committed by Bjorn Andersson

arm64: dts: qcom: sm8550: Add graphics clock controller

Add device node for graphics clock controller on Qualcomm
SM8550 platform.
Signed-off-by: default avatarJagadeesh Kona <quic_jkona@quicinc.com>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524181800.28717-4-quic_jkona@quicinc.com
parent 83680506
...@@ -6,6 +6,7 @@ ...@@ -6,6 +6,7 @@
#include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,sm8450-videocc.h> #include <dt-bindings/clock/qcom,sm8450-videocc.h>
#include <dt-bindings/clock/qcom,sm8550-gcc.h> #include <dt-bindings/clock/qcom,sm8550-gcc.h>
#include <dt-bindings/clock/qcom,sm8550-gpucc.h>
#include <dt-bindings/clock/qcom,sm8550-tcsr.h> #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
#include <dt-bindings/clock/qcom,sm8550-dispcc.h> #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
#include <dt-bindings/dma/qcom-gpi.h> #include <dt-bindings/dma/qcom-gpi.h>
...@@ -1952,6 +1953,17 @@ tcsr: clock-controller@1fc0000 { ...@@ -1952,6 +1953,17 @@ tcsr: clock-controller@1fc0000 {
#reset-cells = <1>; #reset-cells = <1>;
}; };
gpucc: clock-controller@3d90000 {
compatible = "qcom,sm8550-gpucc";
reg = <0 0x03d90000 0 0xa000>;
clocks = <&bi_tcxo_div2>,
<&gcc GCC_GPU_GPLL0_CLK_SRC>,
<&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
};
remoteproc_mpss: remoteproc@4080000 { remoteproc_mpss: remoteproc@4080000 {
compatible = "qcom,sm8550-mpss-pas"; compatible = "qcom,sm8550-mpss-pas";
reg = <0x0 0x04080000 0x0 0x4040>; reg = <0x0 0x04080000 0x0 0x4040>;
......
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