Commit 9f8573e3 authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Simon Horman

arm64: dts: renesas: r8a7795: Add VSP instances

The r8a7795 has 9 VSP instances.
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 52cd0783
...@@ -1295,6 +1295,16 @@ pciec1: pcie@ee800000 { ...@@ -1295,6 +1295,16 @@ pciec1: pcie@ee800000 {
status = "disabled"; status = "disabled";
}; };
vspbc: vsp@fe920000 {
compatible = "renesas,vsp2";
reg = <0 0xfe920000 0 0x8000>;
interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 624>;
power-domains = <&sysc R8A7795_PD_A3VP>;
renesas,fcp = <&fcpvb1>;
};
fcpvb1: fcp@fe92f000 { fcpvb1: fcp@fe92f000 {
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv"; compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
reg = <0 0xfe92f000 0 0x200>; reg = <0 0xfe92f000 0 0x200>;
...@@ -1323,6 +1333,16 @@ fcpf2: fcp@fe952000 { ...@@ -1323,6 +1333,16 @@ fcpf2: fcp@fe952000 {
power-domains = <&sysc R8A7795_PD_A3VP>; power-domains = <&sysc R8A7795_PD_A3VP>;
}; };
vspbd: vsp@fe960000 {
compatible = "renesas,vsp2";
reg = <0 0xfe960000 0 0x8000>;
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 626>;
power-domains = <&sysc R8A7795_PD_A3VP>;
renesas,fcp = <&fcpvb0>;
};
fcpvb0: fcp@fe96f000 { fcpvb0: fcp@fe96f000 {
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv"; compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
reg = <0 0xfe96f000 0 0x200>; reg = <0 0xfe96f000 0 0x200>;
...@@ -1330,6 +1350,16 @@ fcpvb0: fcp@fe96f000 { ...@@ -1330,6 +1350,16 @@ fcpvb0: fcp@fe96f000 {
power-domains = <&sysc R8A7795_PD_A3VP>; power-domains = <&sysc R8A7795_PD_A3VP>;
}; };
vspi0: vsp@fe9a0000 {
compatible = "renesas,vsp2";
reg = <0 0xfe9a0000 0 0x8000>;
interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 631>;
power-domains = <&sysc R8A7795_PD_A3VP>;
renesas,fcp = <&fcpvi0>;
};
fcpvi0: fcp@fe9af000 { fcpvi0: fcp@fe9af000 {
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv"; compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
reg = <0 0xfe9af000 0 0x200>; reg = <0 0xfe9af000 0 0x200>;
...@@ -1337,6 +1367,16 @@ fcpvi0: fcp@fe9af000 { ...@@ -1337,6 +1367,16 @@ fcpvi0: fcp@fe9af000 {
power-domains = <&sysc R8A7795_PD_A3VP>; power-domains = <&sysc R8A7795_PD_A3VP>;
}; };
vspi1: vsp@fe9b0000 {
compatible = "renesas,vsp2";
reg = <0 0xfe9b0000 0 0x8000>;
interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 630>;
power-domains = <&sysc R8A7795_PD_A3VP>;
renesas,fcp = <&fcpvi1>;
};
fcpvi1: fcp@fe9bf000 { fcpvi1: fcp@fe9bf000 {
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv"; compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
reg = <0 0xfe9bf000 0 0x200>; reg = <0 0xfe9bf000 0 0x200>;
...@@ -1344,6 +1384,16 @@ fcpvi1: fcp@fe9bf000 { ...@@ -1344,6 +1384,16 @@ fcpvi1: fcp@fe9bf000 {
power-domains = <&sysc R8A7795_PD_A3VP>; power-domains = <&sysc R8A7795_PD_A3VP>;
}; };
vspi2: vsp@fe9c0000 {
compatible = "renesas,vsp2";
reg = <0 0xfe9c0000 0 0x8000>;
interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 629>;
power-domains = <&sysc R8A7795_PD_A3VP>;
renesas,fcp = <&fcpvi2>;
};
fcpvi2: fcp@fe9cf000 { fcpvi2: fcp@fe9cf000 {
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv"; compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
reg = <0 0xfe9cf000 0 0x200>; reg = <0 0xfe9cf000 0 0x200>;
...@@ -1351,6 +1401,16 @@ fcpvi2: fcp@fe9cf000 { ...@@ -1351,6 +1401,16 @@ fcpvi2: fcp@fe9cf000 {
power-domains = <&sysc R8A7795_PD_A3VP>; power-domains = <&sysc R8A7795_PD_A3VP>;
}; };
vspd0: vsp@fea20000 {
compatible = "renesas,vsp2";
reg = <0 0xfea20000 0 0x4000>;
interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 623>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
renesas,fcp = <&fcpvd0>;
};
fcpvd0: fcp@fea27000 { fcpvd0: fcp@fea27000 {
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv"; compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
reg = <0 0xfea27000 0 0x200>; reg = <0 0xfea27000 0 0x200>;
...@@ -1358,6 +1418,16 @@ fcpvd0: fcp@fea27000 { ...@@ -1358,6 +1418,16 @@ fcpvd0: fcp@fea27000 {
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
}; };
vspd1: vsp@fea28000 {
compatible = "renesas,vsp2";
reg = <0 0xfea28000 0 0x4000>;
interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 622>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
renesas,fcp = <&fcpvd1>;
};
fcpvd1: fcp@fea2f000 { fcpvd1: fcp@fea2f000 {
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv"; compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
reg = <0 0xfea2f000 0 0x200>; reg = <0 0xfea2f000 0 0x200>;
...@@ -1365,6 +1435,16 @@ fcpvd1: fcp@fea2f000 { ...@@ -1365,6 +1435,16 @@ fcpvd1: fcp@fea2f000 {
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
}; };
vspd2: vsp@fea30000 {
compatible = "renesas,vsp2";
reg = <0 0xfea30000 0 0x4000>;
interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 621>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
renesas,fcp = <&fcpvd2>;
};
fcpvd2: fcp@fea37000 { fcpvd2: fcp@fea37000 {
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv"; compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
reg = <0 0xfea37000 0 0x200>; reg = <0 0xfea37000 0 0x200>;
...@@ -1372,6 +1452,16 @@ fcpvd2: fcp@fea37000 { ...@@ -1372,6 +1452,16 @@ fcpvd2: fcp@fea37000 {
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
}; };
vspd3: vsp@fea38000 {
compatible = "renesas,vsp2";
reg = <0 0xfea38000 0 0x4000>;
interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 620>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
renesas,fcp = <&fcpvd3>;
};
fcpvd3: fcp@fea3f000 { fcpvd3: fcp@fea3f000 {
compatible = "renesas,r8a7795-fcpv", "renesas,fcpv"; compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
reg = <0 0xfea3f000 0 0x200>; reg = <0 0xfea3f000 0 0x200>;
......
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