Commit 9fccec82 authored by Hans de Goede's avatar Hans de Goede

pwm: crc: Implement apply() method to support the new atomic PWM API

Replace the enable, disable and config pwm_ops with an apply op,
to support the new atomic PWM API.
Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: default avatarThierry Reding <thierry.reding@gmail.com>
Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200903112337.4113-13-hdegoede@redhat.com
parent 6fdefe60
...@@ -51,59 +51,78 @@ static int crc_pwm_calc_clk_div(int period_ns) ...@@ -51,59 +51,78 @@ static int crc_pwm_calc_clk_div(int period_ns)
return clk_div; return clk_div;
} }
static int crc_pwm_enable(struct pwm_chip *c, struct pwm_device *pwm) static int crc_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
const struct pwm_state *state)
{ {
struct crystalcove_pwm *crc_pwm = to_crc_pwm(c); struct crystalcove_pwm *crc_pwm = to_crc_pwm(chip);
int div = crc_pwm_calc_clk_div(pwm_get_period(pwm)); struct device *dev = crc_pwm->chip.dev;
int err;
regmap_write(crc_pwm->regmap, PWM0_CLK_DIV, div | PWM_OUTPUT_ENABLE); if (state->period > PWM_MAX_PERIOD_NS) {
regmap_write(crc_pwm->regmap, BACKLIGHT_EN, 1); dev_err(dev, "un-supported period_ns\n");
return -EINVAL;
}
return 0; if (state->polarity != PWM_POLARITY_NORMAL)
} return -EOPNOTSUPP;
static void crc_pwm_disable(struct pwm_chip *c, struct pwm_device *pwm) if (pwm_is_enabled(pwm) && !state->enabled) {
{ err = regmap_write(crc_pwm->regmap, BACKLIGHT_EN, 0);
struct crystalcove_pwm *crc_pwm = to_crc_pwm(c); if (err) {
int div = crc_pwm_calc_clk_div(pwm_get_period(pwm)); dev_err(dev, "Error writing BACKLIGHT_EN %d\n", err);
return err;
}
}
regmap_write(crc_pwm->regmap, BACKLIGHT_EN, 0); if (pwm_get_duty_cycle(pwm) != state->duty_cycle ||
regmap_write(crc_pwm->regmap, PWM0_CLK_DIV, div); pwm_get_period(pwm) != state->period) {
} u64 level = state->duty_cycle * PWM_MAX_LEVEL;
static int crc_pwm_config(struct pwm_chip *c, struct pwm_device *pwm, do_div(level, state->period);
int duty_ns, int period_ns)
{
struct crystalcove_pwm *crc_pwm = to_crc_pwm(c);
struct device *dev = crc_pwm->chip.dev;
int level;
if (period_ns > PWM_MAX_PERIOD_NS) { err = regmap_write(crc_pwm->regmap, PWM0_DUTY_CYCLE, level);
dev_err(dev, "un-supported period_ns\n"); if (err) {
return -EINVAL; dev_err(dev, "Error writing PWM0_DUTY_CYCLE %d\n", err);
return err;
}
} }
if (pwm_get_period(pwm) != period_ns) { if (pwm_is_enabled(pwm) && state->enabled &&
int clk_div = crc_pwm_calc_clk_div(period_ns); pwm_get_period(pwm) != state->period) {
/* changing the clk divisor, clear PWM_OUTPUT_ENABLE first */ /* changing the clk divisor, clear PWM_OUTPUT_ENABLE first */
regmap_write(crc_pwm->regmap, PWM0_CLK_DIV, 0); err = regmap_write(crc_pwm->regmap, PWM0_CLK_DIV, 0);
if (err) {
dev_err(dev, "Error writing PWM0_CLK_DIV %d\n", err);
return err;
}
}
regmap_write(crc_pwm->regmap, PWM0_CLK_DIV, if (pwm_get_period(pwm) != state->period ||
clk_div | PWM_OUTPUT_ENABLE); pwm_is_enabled(pwm) != state->enabled) {
int clk_div = crc_pwm_calc_clk_div(state->period);
int pwm_output_enable = state->enabled ? PWM_OUTPUT_ENABLE : 0;
err = regmap_write(crc_pwm->regmap, PWM0_CLK_DIV,
clk_div | pwm_output_enable);
if (err) {
dev_err(dev, "Error writing PWM0_CLK_DIV %d\n", err);
return err;
}
} }
/* change the pwm duty cycle */ if (!pwm_is_enabled(pwm) && state->enabled) {
level = duty_ns * PWM_MAX_LEVEL / period_ns; err = regmap_write(crc_pwm->regmap, BACKLIGHT_EN, 1);
regmap_write(crc_pwm->regmap, PWM0_DUTY_CYCLE, level); if (err) {
dev_err(dev, "Error writing BACKLIGHT_EN %d\n", err);
return err;
}
}
return 0; return 0;
} }
static const struct pwm_ops crc_pwm_ops = { static const struct pwm_ops crc_pwm_ops = {
.config = crc_pwm_config, .apply = crc_pwm_apply,
.enable = crc_pwm_enable,
.disable = crc_pwm_disable,
}; };
static int crystalcove_pwm_probe(struct platform_device *pdev) static int crystalcove_pwm_probe(struct platform_device *pdev)
......
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