Commit a014c355 authored by Russell King (Oracle)'s avatar Russell King (Oracle) Committed by Jakub Kicinski

net: stmmac: clarify difference between "interface" and "phy_interface"

Clarify the difference between "interface" and "phy_interface" in
struct plat_stmmacenet_data, both by adding a comment, and also
renaming "interface" to be "mac_interface". The difference between
these are:

 MAC ----- optional PCS ----- SerDes ----- optional PHY ----- Media
       ^                               ^
 mac_interface                   phy_interface

Note that phylink currently only deals with phy_interface.
Signed-off-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://lore.kernel.org/r/E1qZq83-005tts-6K@rmk-PC.armlinux.org.ukSigned-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 72f93a31
...@@ -70,7 +70,7 @@ static int imx8mp_set_intf_mode(struct plat_stmmacenet_data *plat_dat) ...@@ -70,7 +70,7 @@ static int imx8mp_set_intf_mode(struct plat_stmmacenet_data *plat_dat)
struct imx_priv_data *dwmac = plat_dat->bsp_priv; struct imx_priv_data *dwmac = plat_dat->bsp_priv;
int val; int val;
switch (plat_dat->interface) { switch (plat_dat->mac_interface) {
case PHY_INTERFACE_MODE_MII: case PHY_INTERFACE_MODE_MII:
val = GPR_ENET_QOS_INTF_SEL_MII; val = GPR_ENET_QOS_INTF_SEL_MII;
break; break;
...@@ -87,7 +87,7 @@ static int imx8mp_set_intf_mode(struct plat_stmmacenet_data *plat_dat) ...@@ -87,7 +87,7 @@ static int imx8mp_set_intf_mode(struct plat_stmmacenet_data *plat_dat)
break; break;
default: default:
pr_debug("imx dwmac doesn't support %d interface\n", pr_debug("imx dwmac doesn't support %d interface\n",
plat_dat->interface); plat_dat->mac_interface);
return -EINVAL; return -EINVAL;
} }
...@@ -110,7 +110,7 @@ static int imx93_set_intf_mode(struct plat_stmmacenet_data *plat_dat) ...@@ -110,7 +110,7 @@ static int imx93_set_intf_mode(struct plat_stmmacenet_data *plat_dat)
struct imx_priv_data *dwmac = plat_dat->bsp_priv; struct imx_priv_data *dwmac = plat_dat->bsp_priv;
int val; int val;
switch (plat_dat->interface) { switch (plat_dat->mac_interface) {
case PHY_INTERFACE_MODE_MII: case PHY_INTERFACE_MODE_MII:
val = MX93_GPR_ENET_QOS_INTF_SEL_MII; val = MX93_GPR_ENET_QOS_INTF_SEL_MII;
break; break;
...@@ -125,7 +125,7 @@ static int imx93_set_intf_mode(struct plat_stmmacenet_data *plat_dat) ...@@ -125,7 +125,7 @@ static int imx93_set_intf_mode(struct plat_stmmacenet_data *plat_dat)
break; break;
default: default:
dev_dbg(dwmac->dev, "imx dwmac doesn't support %d interface\n", dev_dbg(dwmac->dev, "imx dwmac doesn't support %d interface\n",
plat_dat->interface); plat_dat->mac_interface);
return -EINVAL; return -EINVAL;
} }
...@@ -192,8 +192,8 @@ static void imx_dwmac_fix_speed(void *priv, unsigned int speed, unsigned int mod ...@@ -192,8 +192,8 @@ static void imx_dwmac_fix_speed(void *priv, unsigned int speed, unsigned int mod
plat_dat = dwmac->plat_dat; plat_dat = dwmac->plat_dat;
if (dwmac->ops->mac_rgmii_txclk_auto_adj || if (dwmac->ops->mac_rgmii_txclk_auto_adj ||
(plat_dat->interface == PHY_INTERFACE_MODE_RMII) || (plat_dat->mac_interface == PHY_INTERFACE_MODE_RMII) ||
(plat_dat->interface == PHY_INTERFACE_MODE_MII)) (plat_dat->mac_interface == PHY_INTERFACE_MODE_MII))
return; return;
switch (speed) { switch (speed) {
...@@ -260,7 +260,7 @@ static int imx_dwmac_mx93_reset(void *priv, void __iomem *ioaddr) ...@@ -260,7 +260,7 @@ static int imx_dwmac_mx93_reset(void *priv, void __iomem *ioaddr)
value |= DMA_BUS_MODE_SFT_RESET; value |= DMA_BUS_MODE_SFT_RESET;
writel(value, ioaddr + DMA_BUS_MODE); writel(value, ioaddr + DMA_BUS_MODE);
if (plat_dat->interface == PHY_INTERFACE_MODE_RMII) { if (plat_dat->mac_interface == PHY_INTERFACE_MODE_RMII) {
usleep_range(100, 200); usleep_range(100, 200);
writel(RMII_RESET_SPEED, ioaddr + MAC_CTRL_REG); writel(RMII_RESET_SPEED, ioaddr + MAC_CTRL_REG);
} }
......
...@@ -89,7 +89,7 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat) ...@@ -89,7 +89,7 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
struct ingenic_mac *mac = plat_dat->bsp_priv; struct ingenic_mac *mac = plat_dat->bsp_priv;
unsigned int val; unsigned int val;
switch (plat_dat->interface) { switch (plat_dat->mac_interface) {
case PHY_INTERFACE_MODE_MII: case PHY_INTERFACE_MODE_MII:
val = FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT) | val = FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT) |
FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_MII); FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_MII);
...@@ -118,7 +118,7 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat) ...@@ -118,7 +118,7 @@ static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
break; break;
default: default:
dev_err(mac->dev, "Unsupported interface %d", plat_dat->interface); dev_err(mac->dev, "Unsupported interface %d", plat_dat->mac_interface);
return -EINVAL; return -EINVAL;
} }
...@@ -130,13 +130,13 @@ static int x1000_mac_set_mode(struct plat_stmmacenet_data *plat_dat) ...@@ -130,13 +130,13 @@ static int x1000_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
{ {
struct ingenic_mac *mac = plat_dat->bsp_priv; struct ingenic_mac *mac = plat_dat->bsp_priv;
switch (plat_dat->interface) { switch (plat_dat->mac_interface) {
case PHY_INTERFACE_MODE_RMII: case PHY_INTERFACE_MODE_RMII:
dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n");
break; break;
default: default:
dev_err(mac->dev, "Unsupported interface %d", plat_dat->interface); dev_err(mac->dev, "Unsupported interface %d", plat_dat->mac_interface);
return -EINVAL; return -EINVAL;
} }
...@@ -149,14 +149,14 @@ static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat) ...@@ -149,14 +149,14 @@ static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
struct ingenic_mac *mac = plat_dat->bsp_priv; struct ingenic_mac *mac = plat_dat->bsp_priv;
unsigned int val; unsigned int val;
switch (plat_dat->interface) { switch (plat_dat->mac_interface) {
case PHY_INTERFACE_MODE_RMII: case PHY_INTERFACE_MODE_RMII:
val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII); val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII);
dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n"); dev_dbg(mac->dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n");
break; break;
default: default:
dev_err(mac->dev, "Unsupported interface %d", plat_dat->interface); dev_err(mac->dev, "Unsupported interface %d", plat_dat->mac_interface);
return -EINVAL; return -EINVAL;
} }
...@@ -169,7 +169,7 @@ static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat) ...@@ -169,7 +169,7 @@ static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
struct ingenic_mac *mac = plat_dat->bsp_priv; struct ingenic_mac *mac = plat_dat->bsp_priv;
unsigned int val; unsigned int val;
switch (plat_dat->interface) { switch (plat_dat->mac_interface) {
case PHY_INTERFACE_MODE_RMII: case PHY_INTERFACE_MODE_RMII:
val = FIELD_PREP(MACPHYC_MODE_SEL_MASK, MACPHYC_MODE_SEL_RMII) | val = FIELD_PREP(MACPHYC_MODE_SEL_MASK, MACPHYC_MODE_SEL_RMII) |
FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII); FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII);
...@@ -177,7 +177,7 @@ static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat) ...@@ -177,7 +177,7 @@ static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
break; break;
default: default:
dev_err(mac->dev, "Unsupported interface %d", plat_dat->interface); dev_err(mac->dev, "Unsupported interface %d", plat_dat->mac_interface);
return -EINVAL; return -EINVAL;
} }
...@@ -190,7 +190,7 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat) ...@@ -190,7 +190,7 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
struct ingenic_mac *mac = plat_dat->bsp_priv; struct ingenic_mac *mac = plat_dat->bsp_priv;
unsigned int val; unsigned int val;
switch (plat_dat->interface) { switch (plat_dat->mac_interface) {
case PHY_INTERFACE_MODE_RMII: case PHY_INTERFACE_MODE_RMII:
val = FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN) | val = FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN) |
FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN) | FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN) |
...@@ -220,7 +220,7 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat) ...@@ -220,7 +220,7 @@ static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat)
break; break;
default: default:
dev_err(mac->dev, "Unsupported interface %d", plat_dat->interface); dev_err(mac->dev, "Unsupported interface %d", plat_dat->mac_interface);
return -EINVAL; return -EINVAL;
} }
......
...@@ -117,7 +117,7 @@ static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id ...@@ -117,7 +117,7 @@ static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id
} }
plat->phy_interface = phy_mode; plat->phy_interface = phy_mode;
plat->interface = PHY_INTERFACE_MODE_GMII; plat->mac_interface = PHY_INTERFACE_MODE_GMII;
pci_set_master(pdev); pci_set_master(pdev);
......
...@@ -50,9 +50,9 @@ static int lpc18xx_dwmac_probe(struct platform_device *pdev) ...@@ -50,9 +50,9 @@ static int lpc18xx_dwmac_probe(struct platform_device *pdev)
goto err_remove_config_dt; goto err_remove_config_dt;
} }
if (plat_dat->interface == PHY_INTERFACE_MODE_MII) { if (plat_dat->mac_interface == PHY_INTERFACE_MODE_MII) {
ethmode = LPC18XX_CREG_CREG6_ETHMODE_MII; ethmode = LPC18XX_CREG_CREG6_ETHMODE_MII;
} else if (plat_dat->interface == PHY_INTERFACE_MODE_RMII) { } else if (plat_dat->mac_interface == PHY_INTERFACE_MODE_RMII) {
ethmode = LPC18XX_CREG_CREG6_ETHMODE_RMII; ethmode = LPC18XX_CREG_CREG6_ETHMODE_RMII;
} else { } else {
dev_err(&pdev->dev, "Only MII and RMII mode supported\n"); dev_err(&pdev->dev, "Only MII and RMII mode supported\n");
......
...@@ -587,7 +587,7 @@ static int mediatek_dwmac_common_data(struct platform_device *pdev, ...@@ -587,7 +587,7 @@ static int mediatek_dwmac_common_data(struct platform_device *pdev,
{ {
int i; int i;
plat->interface = priv_plat->phy_mode; plat->mac_interface = priv_plat->phy_mode;
if (priv_plat->mac_wol) if (priv_plat->mac_wol)
plat->flags |= STMMAC_FLAG_USE_PHY_WOL; plat->flags |= STMMAC_FLAG_USE_PHY_WOL;
else else
......
...@@ -236,7 +236,7 @@ static int socfpga_get_plat_phymode(struct socfpga_dwmac *dwmac) ...@@ -236,7 +236,7 @@ static int socfpga_get_plat_phymode(struct socfpga_dwmac *dwmac)
struct net_device *ndev = dev_get_drvdata(dwmac->dev); struct net_device *ndev = dev_get_drvdata(dwmac->dev);
struct stmmac_priv *priv = netdev_priv(ndev); struct stmmac_priv *priv = netdev_priv(ndev);
return priv->plat->interface; return priv->plat->mac_interface;
} }
static void socfpga_sgmii_config(struct socfpga_dwmac *dwmac, bool enable) static void socfpga_sgmii_config(struct socfpga_dwmac *dwmac, bool enable)
......
...@@ -60,7 +60,7 @@ static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat) ...@@ -60,7 +60,7 @@ static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
unsigned int mode; unsigned int mode;
int err; int err;
switch (plat_dat->interface) { switch (plat_dat->mac_interface) {
case PHY_INTERFACE_MODE_RMII: case PHY_INTERFACE_MODE_RMII:
mode = STARFIVE_DWMAC_PHY_INFT_RMII; mode = STARFIVE_DWMAC_PHY_INFT_RMII;
break; break;
...@@ -72,7 +72,7 @@ static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat) ...@@ -72,7 +72,7 @@ static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
default: default:
dev_err(dwmac->dev, "unsupported interface %d\n", dev_err(dwmac->dev, "unsupported interface %d\n",
plat_dat->interface); plat_dat->mac_interface);
return -EINVAL; return -EINVAL;
} }
......
...@@ -171,7 +171,7 @@ static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat) ...@@ -171,7 +171,7 @@ static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat)
clk_rate = clk_get_rate(dwmac->clk_eth_ck); clk_rate = clk_get_rate(dwmac->clk_eth_ck);
dwmac->enable_eth_ck = false; dwmac->enable_eth_ck = false;
switch (plat_dat->interface) { switch (plat_dat->mac_interface) {
case PHY_INTERFACE_MODE_MII: case PHY_INTERFACE_MODE_MII:
if (clk_rate == ETH_CK_F_25M && dwmac->ext_phyclk) if (clk_rate == ETH_CK_F_25M && dwmac->ext_phyclk)
dwmac->enable_eth_ck = true; dwmac->enable_eth_ck = true;
...@@ -210,7 +210,7 @@ static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat) ...@@ -210,7 +210,7 @@ static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat)
break; break;
default: default:
pr_debug("SYSCFG init : Do not manage %d interface\n", pr_debug("SYSCFG init : Do not manage %d interface\n",
plat_dat->interface); plat_dat->mac_interface);
/* Do not manage others interfaces */ /* Do not manage others interfaces */
return -EINVAL; return -EINVAL;
} }
...@@ -230,7 +230,7 @@ static int stm32mcu_set_mode(struct plat_stmmacenet_data *plat_dat) ...@@ -230,7 +230,7 @@ static int stm32mcu_set_mode(struct plat_stmmacenet_data *plat_dat)
u32 reg = dwmac->mode_reg; u32 reg = dwmac->mode_reg;
int val; int val;
switch (plat_dat->interface) { switch (plat_dat->mac_interface) {
case PHY_INTERFACE_MODE_MII: case PHY_INTERFACE_MODE_MII:
val = SYSCFG_MCU_ETH_SEL_MII; val = SYSCFG_MCU_ETH_SEL_MII;
pr_debug("SYSCFG init : PHY_INTERFACE_MODE_MII\n"); pr_debug("SYSCFG init : PHY_INTERFACE_MODE_MII\n");
...@@ -241,7 +241,7 @@ static int stm32mcu_set_mode(struct plat_stmmacenet_data *plat_dat) ...@@ -241,7 +241,7 @@ static int stm32mcu_set_mode(struct plat_stmmacenet_data *plat_dat)
break; break;
default: default:
pr_debug("SYSCFG init : Do not manage %d interface\n", pr_debug("SYSCFG init : Do not manage %d interface\n",
plat_dat->interface); plat_dat->mac_interface);
/* Do not manage others interfaces */ /* Do not manage others interfaces */
return -EINVAL; return -EINVAL;
} }
......
...@@ -1016,7 +1016,7 @@ static int sun8i_dwmac_set_syscon(struct device *dev, ...@@ -1016,7 +1016,7 @@ static int sun8i_dwmac_set_syscon(struct device *dev,
if (gmac->variant->support_rmii) if (gmac->variant->support_rmii)
reg &= ~SYSCON_RMII_EN; reg &= ~SYSCON_RMII_EN;
switch (plat->interface) { switch (plat->mac_interface) {
case PHY_INTERFACE_MODE_MII: case PHY_INTERFACE_MODE_MII:
/* default */ /* default */
break; break;
...@@ -1031,7 +1031,7 @@ static int sun8i_dwmac_set_syscon(struct device *dev, ...@@ -1031,7 +1031,7 @@ static int sun8i_dwmac_set_syscon(struct device *dev,
break; break;
default: default:
dev_err(dev, "Unsupported interface mode: %s", dev_err(dev, "Unsupported interface mode: %s",
phy_modes(plat->interface)); phy_modes(plat->mac_interface));
return -EINVAL; return -EINVAL;
} }
...@@ -1231,7 +1231,7 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) ...@@ -1231,7 +1231,7 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
/* platform data specifying hardware features and callbacks. /* platform data specifying hardware features and callbacks.
* hardware features were copied from Allwinner drivers. * hardware features were copied from Allwinner drivers.
*/ */
plat_dat->interface = interface; plat_dat->mac_interface = interface;
plat_dat->rx_coe = STMMAC_RX_COE_TYPE2; plat_dat->rx_coe = STMMAC_RX_COE_TYPE2;
plat_dat->tx_coe = 1; plat_dat->tx_coe = 1;
plat_dat->flags |= STMMAC_FLAG_HAS_SUN8I; plat_dat->flags |= STMMAC_FLAG_HAS_SUN8I;
......
...@@ -1119,7 +1119,7 @@ static const struct phylink_mac_ops stmmac_phylink_mac_ops = { ...@@ -1119,7 +1119,7 @@ static const struct phylink_mac_ops stmmac_phylink_mac_ops = {
*/ */
static void stmmac_check_pcs_mode(struct stmmac_priv *priv) static void stmmac_check_pcs_mode(struct stmmac_priv *priv)
{ {
int interface = priv->plat->interface; int interface = priv->plat->mac_interface;
if (priv->dma_cap.pcs) { if (priv->dma_cap.pcs) {
if ((interface == PHY_INTERFACE_MODE_RGMII) || if ((interface == PHY_INTERFACE_MODE_RGMII) ||
...@@ -1214,7 +1214,9 @@ static int stmmac_phy_setup(struct stmmac_priv *priv) ...@@ -1214,7 +1214,9 @@ static int stmmac_phy_setup(struct stmmac_priv *priv)
priv->phylink_config.ovr_an_inband = priv->phylink_config.ovr_an_inband =
mdio_bus_data->xpcs_an_inband; mdio_bus_data->xpcs_an_inband;
/* Set the platform/firmware specified interface mode */ /* Set the platform/firmware specified interface mode. Note, phylink
* deals with the PHY interface mode, not the MAC interface mode.
*/
__set_bit(mode, priv->phylink_config.supported_interfaces); __set_bit(mode, priv->phylink_config.supported_interfaces);
/* If we have an xpcs, it defines which PHY interfaces are supported. */ /* If we have an xpcs, it defines which PHY interfaces are supported. */
......
...@@ -419,9 +419,9 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac) ...@@ -419,9 +419,9 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
return ERR_PTR(phy_mode); return ERR_PTR(phy_mode);
plat->phy_interface = phy_mode; plat->phy_interface = phy_mode;
plat->interface = stmmac_of_get_mac_mode(np); plat->mac_interface = stmmac_of_get_mac_mode(np);
if (plat->interface < 0) if (plat->mac_interface < 0)
plat->interface = plat->phy_interface; plat->mac_interface = plat->phy_interface;
/* Some wrapper drivers still rely on phy_node. Let's save it while /* Some wrapper drivers still rely on phy_node. Let's save it while
* they are not converted to phylink. */ * they are not converted to phylink. */
......
...@@ -223,7 +223,20 @@ struct dwmac4_addrs { ...@@ -223,7 +223,20 @@ struct dwmac4_addrs {
struct plat_stmmacenet_data { struct plat_stmmacenet_data {
int bus_id; int bus_id;
int phy_addr; int phy_addr;
int interface; /* MAC ----- optional PCS ----- SerDes ----- optional PHY ----- Media
* ^ ^
* mac_interface phy_interface
*
* mac_interface is the MAC-side interface, which may be the same
* as phy_interface if there is no intervening PCS. If there is a
* PCS, then mac_interface describes the interface mode between the
* MAC and PCS, and phy_interface describes the interface mode
* between the PCS and PHY.
*/
phy_interface_t mac_interface;
/* phy_interface is the PHY-side interface - the interface used by
* an attached PHY.
*/
phy_interface_t phy_interface; phy_interface_t phy_interface;
struct stmmac_mdio_bus_data *mdio_bus_data; struct stmmac_mdio_bus_data *mdio_bus_data;
struct device_node *phy_node; struct device_node *phy_node;
......
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