Commit a0a2f7bb authored by Candice Li's avatar Candice Li Committed by Alex Deucher

drm/amd/amdgpu: add mpio to ras block

Add MPIO to RAS block
Signed-off-by: default avatarCandice Li <candice.li@amd.com>
Reviewed-by: default avatarJohn Clements <john.clements@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 25c94b33
...@@ -61,6 +61,7 @@ const char *ras_block_string[] = { ...@@ -61,6 +61,7 @@ const char *ras_block_string[] = {
"mp0", "mp0",
"mp1", "mp1",
"fuse", "fuse",
"mpio",
}; };
#define ras_err_str(i) (ras_error_string[ffs(i)]) #define ras_err_str(i) (ras_error_string[ffs(i)])
......
...@@ -544,6 +544,8 @@ amdgpu_ras_block_to_ta(enum amdgpu_ras_block block) { ...@@ -544,6 +544,8 @@ amdgpu_ras_block_to_ta(enum amdgpu_ras_block block) {
return TA_RAS_BLOCK__MP1; return TA_RAS_BLOCK__MP1;
case AMDGPU_RAS_BLOCK__FUSE: case AMDGPU_RAS_BLOCK__FUSE:
return TA_RAS_BLOCK__FUSE; return TA_RAS_BLOCK__FUSE;
case AMDGPU_RAS_BLOCK__MPIO:
return TA_RAS_BLOCK__MPIO;
default: default:
WARN_ONCE(1, "RAS ERROR: unexpected block id %d\n", block); WARN_ONCE(1, "RAS ERROR: unexpected block id %d\n", block);
return TA_RAS_BLOCK__UMC; return TA_RAS_BLOCK__UMC;
......
...@@ -73,6 +73,7 @@ enum ta_ras_block { ...@@ -73,6 +73,7 @@ enum ta_ras_block {
TA_RAS_BLOCK__MP0, TA_RAS_BLOCK__MP0,
TA_RAS_BLOCK__MP1, TA_RAS_BLOCK__MP1,
TA_RAS_BLOCK__FUSE, TA_RAS_BLOCK__FUSE,
TA_RAS_BLOCK__MPIO,
TA_NUM_BLOCK_MAX TA_NUM_BLOCK_MAX
}; };
......
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