Commit a135cef7 authored by Borislav Petkov's avatar Borislav Petkov

amd64_edac: Disable DRAM ECC injection on K8

K8 does not allow for an atomic RMW to a cacheline as F10h does so
disable the error injection interface for it.
Signed-off-by: default avatarBorislav Petkov <borislav.petkov@amd.com>
parent 39094443
......@@ -2466,8 +2466,9 @@ static void set_mc_sysfs_attrs(struct mem_ctl_info *mci)
for (; i < ARRAY_SIZE(amd64_dbg_attrs); i++)
sysfs_attrs[i] = amd64_dbg_attrs[i];
for (j = 0; j < ARRAY_SIZE(amd64_inj_attrs); j++, i++)
sysfs_attrs[i] = amd64_inj_attrs[j];
if (boot_cpu_data.x86 >= 0x10)
for (j = 0; j < ARRAY_SIZE(amd64_inj_attrs); j++, i++)
sysfs_attrs[i] = amd64_inj_attrs[j];
sysfs_attrs[i] = terminator;
......
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