Commit a143cef7 authored by Changbin Du's avatar Changbin Du Committed by Zhenyu Wang

drm/i915/gvt: Rename ggtt related functions to be more specific

Accurate names help to avoid confusing so improve readability.
Signed-off-by: default avatarChangbin Du <changbin.du@intel.com>
Reviewed-by: default avatarZhi Wang <zhi.a.wang@intel.com>
Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
parent bc37ab56
...@@ -270,7 +270,7 @@ static u64 read_pte64(struct drm_i915_private *dev_priv, unsigned long index) ...@@ -270,7 +270,7 @@ static u64 read_pte64(struct drm_i915_private *dev_priv, unsigned long index)
return readq(addr); return readq(addr);
} }
static void gtt_invalidate(struct drm_i915_private *dev_priv) static void ggtt_invalidate(struct drm_i915_private *dev_priv)
{ {
mmio_hw_access_pre(dev_priv); mmio_hw_access_pre(dev_priv);
I915_WRITE(GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN); I915_WRITE(GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
...@@ -1873,7 +1873,7 @@ unsigned long intel_vgpu_gma_to_gpa(struct intel_vgpu_mm *mm, unsigned long gma) ...@@ -1873,7 +1873,7 @@ unsigned long intel_vgpu_gma_to_gpa(struct intel_vgpu_mm *mm, unsigned long gma)
return INTEL_GVT_INVALID_ADDR; return INTEL_GVT_INVALID_ADDR;
} }
static int emulate_gtt_mmio_read(struct intel_vgpu *vgpu, static int emulate_ggtt_mmio_read(struct intel_vgpu *vgpu,
unsigned int off, void *p_data, unsigned int bytes) unsigned int off, void *p_data, unsigned int bytes)
{ {
struct intel_vgpu_mm *ggtt_mm = vgpu->gtt.ggtt_mm; struct intel_vgpu_mm *ggtt_mm = vgpu->gtt.ggtt_mm;
...@@ -1902,7 +1902,7 @@ static int emulate_gtt_mmio_read(struct intel_vgpu *vgpu, ...@@ -1902,7 +1902,7 @@ static int emulate_gtt_mmio_read(struct intel_vgpu *vgpu,
* Returns: * Returns:
* Zero on success, error code if failed. * Zero on success, error code if failed.
*/ */
int intel_vgpu_emulate_gtt_mmio_read(struct intel_vgpu *vgpu, unsigned int off, int intel_vgpu_emulate_ggtt_mmio_read(struct intel_vgpu *vgpu, unsigned int off,
void *p_data, unsigned int bytes) void *p_data, unsigned int bytes)
{ {
const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;
...@@ -1912,11 +1912,11 @@ int intel_vgpu_emulate_gtt_mmio_read(struct intel_vgpu *vgpu, unsigned int off, ...@@ -1912,11 +1912,11 @@ int intel_vgpu_emulate_gtt_mmio_read(struct intel_vgpu *vgpu, unsigned int off,
return -EINVAL; return -EINVAL;
off -= info->gtt_start_offset; off -= info->gtt_start_offset;
ret = emulate_gtt_mmio_read(vgpu, off, p_data, bytes); ret = emulate_ggtt_mmio_read(vgpu, off, p_data, bytes);
return ret; return ret;
} }
static int emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, static int emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
void *p_data, unsigned int bytes) void *p_data, unsigned int bytes)
{ {
struct intel_gvt *gvt = vgpu->gvt; struct intel_gvt *gvt = vgpu->gvt;
...@@ -1969,13 +1969,13 @@ static int emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, ...@@ -1969,13 +1969,13 @@ static int emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
out: out:
ggtt_set_host_entry(ggtt_mm, &m, g_gtt_index); ggtt_set_host_entry(ggtt_mm, &m, g_gtt_index);
gtt_invalidate(gvt->dev_priv); ggtt_invalidate(gvt->dev_priv);
ggtt_set_guest_entry(ggtt_mm, &e, g_gtt_index); ggtt_set_guest_entry(ggtt_mm, &e, g_gtt_index);
return 0; return 0;
} }
/* /*
* intel_vgpu_emulate_gtt_mmio_write - emulate GTT MMIO register write * intel_vgpu_emulate_ggtt_mmio_write - emulate GTT MMIO register write
* @vgpu: a vGPU * @vgpu: a vGPU
* @off: register offset * @off: register offset
* @p_data: data from guest write * @p_data: data from guest write
...@@ -1986,8 +1986,8 @@ static int emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, ...@@ -1986,8 +1986,8 @@ static int emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
* Returns: * Returns:
* Zero on success, error code if failed. * Zero on success, error code if failed.
*/ */
int intel_vgpu_emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, int intel_vgpu_emulate_ggtt_mmio_write(struct intel_vgpu *vgpu,
void *p_data, unsigned int bytes) unsigned int off, void *p_data, unsigned int bytes)
{ {
const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;
int ret; int ret;
...@@ -1996,7 +1996,7 @@ int intel_vgpu_emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, ...@@ -1996,7 +1996,7 @@ int intel_vgpu_emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
return -EINVAL; return -EINVAL;
off -= info->gtt_start_offset; off -= info->gtt_start_offset;
ret = emulate_gtt_mmio_write(vgpu, off, p_data, bytes); ret = emulate_ggtt_mmio_write(vgpu, off, p_data, bytes);
return ret; return ret;
} }
...@@ -2457,7 +2457,7 @@ void intel_vgpu_reset_ggtt(struct intel_vgpu *vgpu) ...@@ -2457,7 +2457,7 @@ void intel_vgpu_reset_ggtt(struct intel_vgpu *vgpu)
while (num_entries--) while (num_entries--)
ggtt_set_host_entry(vgpu->gtt.ggtt_mm, &entry, index++); ggtt_set_host_entry(vgpu->gtt.ggtt_mm, &entry, index++);
gtt_invalidate(dev_priv); ggtt_invalidate(dev_priv);
} }
/** /**
......
...@@ -280,10 +280,10 @@ int intel_vgpu_g2v_create_ppgtt_mm(struct intel_vgpu *vgpu, ...@@ -280,10 +280,10 @@ int intel_vgpu_g2v_create_ppgtt_mm(struct intel_vgpu *vgpu,
int intel_vgpu_g2v_destroy_ppgtt_mm(struct intel_vgpu *vgpu, u64 pdps[]); int intel_vgpu_g2v_destroy_ppgtt_mm(struct intel_vgpu *vgpu, u64 pdps[]);
int intel_vgpu_emulate_gtt_mmio_read(struct intel_vgpu *vgpu, int intel_vgpu_emulate_ggtt_mmio_read(struct intel_vgpu *vgpu,
unsigned int off, void *p_data, unsigned int bytes); unsigned int off, void *p_data, unsigned int bytes);
int intel_vgpu_emulate_gtt_mmio_write(struct intel_vgpu *vgpu, int intel_vgpu_emulate_ggtt_mmio_write(struct intel_vgpu *vgpu,
unsigned int off, void *p_data, unsigned int bytes); unsigned int off, void *p_data, unsigned int bytes);
int intel_vgpu_write_protect_handler(struct intel_vgpu *vgpu, u64 pa, int intel_vgpu_write_protect_handler(struct intel_vgpu *vgpu, u64 pa,
......
...@@ -124,7 +124,7 @@ int intel_vgpu_emulate_mmio_read(struct intel_vgpu *vgpu, uint64_t pa, ...@@ -124,7 +124,7 @@ int intel_vgpu_emulate_mmio_read(struct intel_vgpu *vgpu, uint64_t pa,
if (WARN_ON(!reg_is_gtt(gvt, offset + bytes - 1))) if (WARN_ON(!reg_is_gtt(gvt, offset + bytes - 1)))
goto err; goto err;
ret = intel_vgpu_emulate_gtt_mmio_read(vgpu, offset, ret = intel_vgpu_emulate_ggtt_mmio_read(vgpu, offset,
p_data, bytes); p_data, bytes);
if (ret) if (ret)
goto err; goto err;
...@@ -197,7 +197,7 @@ int intel_vgpu_emulate_mmio_write(struct intel_vgpu *vgpu, uint64_t pa, ...@@ -197,7 +197,7 @@ int intel_vgpu_emulate_mmio_write(struct intel_vgpu *vgpu, uint64_t pa,
if (WARN_ON(!reg_is_gtt(gvt, offset + bytes - 1))) if (WARN_ON(!reg_is_gtt(gvt, offset + bytes - 1)))
goto err; goto err;
ret = intel_vgpu_emulate_gtt_mmio_write(vgpu, offset, ret = intel_vgpu_emulate_ggtt_mmio_write(vgpu, offset,
p_data, bytes); p_data, bytes);
if (ret) if (ret)
goto err; goto err;
......
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