Commit a197f3c7 authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Vinod Koul

dmaengine: hsu: correct residue calculation of active descriptor

The commit f0579c8c ("dmaengine: hsu: speed up residue calculation")
speeded up calculation of the queued descriptor but broke the initial residue
value for active descriptor.

In accordance with documentation the hardware descriptor is updated each time
DMA transfered some bytes. It means we have to calculate a sum of lengths of
non-submitted hardware descriptors and whatever current values in the hardware.
Do this straightforward.

Fixes: f0579c8c ("dmaengine: hsu: speed up residue calculation")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent 080edf75
...@@ -254,10 +254,13 @@ static void hsu_dma_issue_pending(struct dma_chan *chan) ...@@ -254,10 +254,13 @@ static void hsu_dma_issue_pending(struct dma_chan *chan)
static size_t hsu_dma_active_desc_size(struct hsu_dma_chan *hsuc) static size_t hsu_dma_active_desc_size(struct hsu_dma_chan *hsuc)
{ {
struct hsu_dma_desc *desc = hsuc->desc; struct hsu_dma_desc *desc = hsuc->desc;
size_t bytes = desc->length; size_t bytes = 0;
int i; int i;
i = desc->active % HSU_DMA_CHAN_NR_DESC; for (i = desc->active; i < desc->nents; i++)
bytes += desc->sg[i].len;
i = HSU_DMA_CHAN_NR_DESC - 1;
do { do {
bytes += hsu_chan_readl(hsuc, HSU_CH_DxTSR(i)); bytes += hsu_chan_readl(hsuc, HSU_CH_DxTSR(i));
} while (--i >= 0); } while (--i >= 0);
......
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