Commit a32f063d authored by Peter Chiu's avatar Peter Chiu Committed by Felix Fietkau

wifi: mt76: connac: add support for dsp firmware download

Add FW_START_WORKING_PDA_DSP for the indication of starting DSP
firmware download, which is for phy-related control.
The firmware is transparent to the driver, but it's necessary for the
firmware download process.
Reviewed-by: default avatarShayne Chen <shayne.chen@mediatek.com>
Signed-off-by: default avatarPeter Chiu <chui-hao.chiu@mediatek.com>
Signed-off-by: default avatarShayne Chen <shayne.chen@mediatek.com>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent d73dab22
......@@ -22,6 +22,7 @@
#define FW_START_OVERRIDE BIT(0)
#define FW_START_WORKING_PDA_CR4 BIT(2)
#define FW_START_WORKING_PDA_DSP BIT(3)
#define PATCH_SEC_NOT_SUPPORT GENMASK(31, 0)
#define PATCH_SEC_TYPE_MASK GENMASK(15, 0)
......
......@@ -2155,7 +2155,7 @@ static int mt7996_load_patch(struct mt7996_dev *dev)
static int
mt7996_mcu_send_ram_firmware(struct mt7996_dev *dev,
const struct mt7996_fw_trailer *hdr,
const u8 *data, bool is_wa)
const u8 *data, enum mt7996_ram_type type)
{
int i, offset = 0;
u32 override = 0, option = 0;
......@@ -2167,8 +2167,10 @@ mt7996_mcu_send_ram_firmware(struct mt7996_dev *dev,
region = (const struct mt7996_fw_region *)((const u8 *)hdr -
(hdr->n_region - i) * sizeof(*region));
/* DSP and WA use same mode */
mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76,
region->feature_set, is_wa);
region->feature_set,
type != MT7996_RAM_TYPE_WM);
len = le32_to_cpu(region->len);
addr = le32_to_cpu(region->addr);
......@@ -2195,19 +2197,22 @@ mt7996_mcu_send_ram_firmware(struct mt7996_dev *dev,
if (override)
option |= FW_START_OVERRIDE;
if (is_wa)
if (type == MT7996_RAM_TYPE_WA)
option |= FW_START_WORKING_PDA_CR4;
else if (type == MT7996_RAM_TYPE_DSP)
option |= FW_START_WORKING_PDA_DSP;
return mt76_connac_mcu_start_firmware(&dev->mt76, override, option);
}
static int mt7996_load_ram(struct mt7996_dev *dev)
static int __mt7996_load_ram(struct mt7996_dev *dev, const char *fw_type,
const char *fw_file, enum mt7996_ram_type ram_type)
{
const struct mt7996_fw_trailer *hdr;
const struct firmware *fw;
int ret;
ret = request_firmware(&fw, MT7996_FIRMWARE_WM, dev->mt76.dev);
ret = request_firmware(&fw, fw_file, dev->mt76.dev);
if (ret)
return ret;
......@@ -2217,37 +2222,13 @@ static int mt7996_load_ram(struct mt7996_dev *dev)
goto out;
}
hdr = (const struct mt7996_fw_trailer *)(fw->data + fw->size - sizeof(*hdr));
dev_info(dev->mt76.dev, "WM Firmware Version: %.10s, Build Time: %.15s\n",
hdr->fw_ver, hdr->build_date);
hdr = (const void *)(fw->data + fw->size - sizeof(*hdr));
dev_info(dev->mt76.dev, "%s Firmware Version: %.10s, Build Time: %.15s\n",
fw_type, hdr->fw_ver, hdr->build_date);
ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, false);
ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, ram_type);
if (ret) {
dev_err(dev->mt76.dev, "Failed to start WM firmware\n");
goto out;
}
release_firmware(fw);
ret = request_firmware(&fw, MT7996_FIRMWARE_WA, dev->mt76.dev);
if (ret)
return ret;
if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
dev_err(dev->mt76.dev, "Invalid firmware\n");
ret = -EINVAL;
goto out;
}
hdr = (const struct mt7996_fw_trailer *)(fw->data + fw->size - sizeof(*hdr));
dev_info(dev->mt76.dev, "WA Firmware Version: %.10s, Build Time: %.15s\n",
hdr->fw_ver, hdr->build_date);
ret = mt7996_mcu_send_ram_firmware(dev, hdr, fw->data, true);
if (ret) {
dev_err(dev->mt76.dev, "Failed to start WA firmware\n");
dev_err(dev->mt76.dev, "Failed to start %s firmware\n", fw_type);
goto out;
}
......@@ -2261,6 +2242,24 @@ static int mt7996_load_ram(struct mt7996_dev *dev)
return ret;
}
static int mt7996_load_ram(struct mt7996_dev *dev)
{
int ret;
ret = __mt7996_load_ram(dev, "WM", MT7996_FIRMWARE_WM,
MT7996_RAM_TYPE_WM);
if (ret)
return ret;
ret = __mt7996_load_ram(dev, "DSP", MT7996_FIRMWARE_DSP,
MT7996_RAM_TYPE_DSP);
if (ret)
return ret;
return __mt7996_load_ram(dev, "WA", MT7996_FIRMWARE_WA,
MT7996_RAM_TYPE_WA);
}
static int
mt7996_firmware_state(struct mt7996_dev *dev, bool wa)
{
......
......@@ -29,6 +29,7 @@
#define MT7996_FIRMWARE_WA "mediatek/mt7996/mt7996_wa.bin"
#define MT7996_FIRMWARE_WM "mediatek/mt7996/mt7996_wm.bin"
#define MT7996_FIRMWARE_DSP "mediatek/mt7996/mt7996_dsp.bin"
#define MT7996_ROM_PATCH "mediatek/mt7996/mt7996_rom_patch.bin"
#define MT7996_EEPROM_DEFAULT "mediatek/mt7996/mt7996_eeprom.bin"
......@@ -52,6 +53,12 @@ struct mt7996_sta;
struct mt7996_dfs_pulse;
struct mt7996_dfs_pattern;
enum mt7996_ram_type {
MT7996_RAM_TYPE_WM,
MT7996_RAM_TYPE_WA,
MT7996_RAM_TYPE_DSP,
};
enum mt7996_txq_id {
MT7996_TXQ_FWDL = 16,
MT7996_TXQ_MCU_WM,
......
......@@ -219,4 +219,5 @@ MODULE_DEVICE_TABLE(pci, mt7996_pci_device_table);
MODULE_DEVICE_TABLE(pci, mt7996_hif_device_table);
MODULE_FIRMWARE(MT7996_FIRMWARE_WA);
MODULE_FIRMWARE(MT7996_FIRMWARE_WM);
MODULE_FIRMWARE(MT7996_FIRMWARE_DSP);
MODULE_FIRMWARE(MT7996_ROM_PATCH);
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