drm: bridge/dw_hdmi: clear i2cmphy_stat0 reg in hdmi_phy_wait_i2c_done
HDMI_IH_I2CMPHY_STAT0 is a clear on write register, which indicates i2cm operation status(i2c transfer done or error), every hdmi phy register configuration must check this register to make sure the configuration has complete. But the indication bit should be cleared after check, otherwise the corresponding bit will hold on forever, this may give a wrong signal for next check. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Tested-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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