Commit a50fe707 authored by Eric Huang's avatar Eric Huang Committed by Alex Deucher

drm/amdkfd: Only apply heavy-weight TLB flush on Aldebaran

It is to workaround HW bug on other Asics and based on
reverting two commits back:
  drm/amdkfd: Add heavy-weight TLB flush after unmapping
  drm/amdkfd: Add memory sync before TLB flush on unmap
Signed-off-by: default avatarEric Huang <jinhuieric.huang@amd.com>
Reviewed-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 3cd293a7
...@@ -1570,23 +1570,25 @@ static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep, ...@@ -1570,23 +1570,25 @@ static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep,
} }
mutex_unlock(&p->mutex); mutex_unlock(&p->mutex);
err = amdgpu_amdkfd_gpuvm_sync_memory(dev->kgd, (struct kgd_mem *) mem, true); if (dev->device_info->asic_family == CHIP_ALDEBARAN) {
if (err) { err = amdgpu_amdkfd_gpuvm_sync_memory(dev->kgd,
pr_debug("Sync memory failed, wait interrupted by user signal\n"); (struct kgd_mem *) mem, true);
goto sync_memory_failed; if (err) {
} pr_debug("Sync memory failed, wait interrupted by user signal\n");
goto sync_memory_failed;
}
/* Flush TLBs after waiting for the page table updates to complete */ /* Flush TLBs after waiting for the page table updates to complete */
for (i = 0; i < args->n_devices; i++) { for (i = 0; i < args->n_devices; i++) {
peer = kfd_device_by_id(devices_arr[i]); peer = kfd_device_by_id(devices_arr[i]);
if (WARN_ON_ONCE(!peer)) if (WARN_ON_ONCE(!peer))
continue; continue;
peer_pdd = kfd_get_process_device_data(peer, p); peer_pdd = kfd_get_process_device_data(peer, p);
if (WARN_ON_ONCE(!peer_pdd)) if (WARN_ON_ONCE(!peer_pdd))
continue; continue;
kfd_flush_tlb(peer_pdd, TLB_FLUSH_HEAVYWEIGHT); kfd_flush_tlb(peer_pdd, TLB_FLUSH_HEAVYWEIGHT);
}
} }
kfree(devices_arr); kfree(devices_arr);
return 0; return 0;
......
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