dt-bindings: xilinx: Remove Rajan, Jolly and Manish

Rajan, Jolly and Manish are no longer work for AMD/Xilinx and there is no
activity from them to continue to maintain bindings that's why remove them.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9b252dd71c82593fa6b137eca2174d9ab6e57f7a.1684828606.git.michal.simek@amd.com

Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml

@@ -8,8 +8,6 @@ title: Xilinx Versal clock controller
 
 maintainers:
   - Michal Simek <michal.simek@amd.com>
-  - Jolly Shah <jolly.shah@xilinx.com>
-  - Rajan Vaja <rajan.vaja@xilinx.com>
 
 description: |
   The clock controller is a hardware block of Xilinx versal clock tree. It

Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml

@@ -8,7 +8,6 @@ title: Synopsys DesignWare Universal Multi-Protocol Memory Controller
 
 maintainers:
   - Krzysztof Kozlowski <krzk@kernel.org>
-  - Manish Narani <manish.narani@xilinx.com>
   - Michal Simek <michal.simek@amd.com>
 
 description: |

Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml

@@ -8,7 +8,6 @@ title: Zynq A05 DDR Memory Controller
 
 maintainers:
   - Krzysztof Kozlowski <krzk@kernel.org>
-  - Manish Narani <manish.narani@xilinx.com>
   - Michal Simek <michal.simek@amd.com>
 
 description:

Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml

@@ -8,7 +8,6 @@ title: Xilinx ZynqMP Pinctrl
 
 maintainers:
   - Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
-  - Rajan Vaja <rajan.vaja@xilinx.com>
 
 description: |
   Please refer to pinctrl-bindings.txt in this directory for details of the