Commit a687b4ef authored by Lucas De Marchi's avatar Lucas De Marchi

drm/i915/tgl: do not enable transcoder clock twice on MST

For MST on Tiger Lake there are different moments when we need to
configure the transcoder clock select. For the first link this is in step
7.a of the spec, before training the link.  For additional streams this
should be done as part of step 8.b after programming receiver VC Payload
ID.

Bspec: 49190
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191030012448.14937-4-lucas.demarchi@intel.com
parent 142110c4
...@@ -3462,9 +3462,10 @@ static void tgl_ddi_pre_enable_dp(struct intel_encoder *encoder, ...@@ -3462,9 +3462,10 @@ static void tgl_ddi_pre_enable_dp(struct intel_encoder *encoder,
icl_program_mg_dp_mode(dig_port, crtc_state); icl_program_mg_dp_mode(dig_port, crtc_state);
/* /*
* 7.a - Steps in this function should only be executed over MST * 7.a - single stream or multi-stream master transcoder: Configure
* master, what will be taken in care by MST hook * Transcoder Clock Select. For additional MST streams this will be done
* intel_mst_pre_enable_dp() * by intel_mst_pre_enable_dp() after programming VC Payload ID through
* AUX.
*/ */
intel_ddi_enable_pipe_clock(crtc_state); intel_ddi_enable_pipe_clock(crtc_state);
......
...@@ -303,21 +303,23 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder, ...@@ -303,21 +303,23 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
to_intel_connector(conn_state->connector); to_intel_connector(conn_state->connector);
int ret; int ret;
u32 temp; u32 temp;
bool first_mst_stream;
/* MST encoders are bound to a crtc, not to a connector, /* MST encoders are bound to a crtc, not to a connector,
* force the mapping here for get_hw_state. * force the mapping here for get_hw_state.
*/ */
connector->encoder = encoder; connector->encoder = encoder;
intel_mst->connector = connector; intel_mst->connector = connector;
first_mst_stream = intel_dp->active_mst_links == 0;
DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links); DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
if (intel_dp->active_mst_links == 0) if (first_mst_stream)
intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true); drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
if (intel_dp->active_mst_links == 0) if (first_mst_stream)
intel_dig_port->base.pre_enable(&intel_dig_port->base, intel_dig_port->base.pre_enable(&intel_dig_port->base,
pipe_config, NULL); pipe_config, NULL);
...@@ -334,7 +336,15 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder, ...@@ -334,7 +336,15 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
intel_ddi_enable_pipe_clock(pipe_config); /*
* Before Gen 12 this is not done as part of
* intel_dig_port->base.pre_enable() and should be done here. For
* Gen 12+ the step in which this should be done is different for the
* first MST stream, so it's done on the DDI for the first stream and
* here for the following ones.
*/
if (INTEL_GEN(dev_priv) < 12 || !first_mst_stream)
intel_ddi_enable_pipe_clock(pipe_config);
} }
static void intel_mst_enable_dp(struct intel_encoder *encoder, static void intel_mst_enable_dp(struct intel_encoder *encoder,
......
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