Commit a7b4deeb authored by Anusha Srivatsa's avatar Anusha Srivatsa Committed by Anusha

drm/i915/cml: Add CML PCI IDS

Comet Lake is a Intel Processor containing Gen9
Intel HD Graphics. This patch adds the initial set of
PCI IDs. Comet Lake comes off of Coffee Lake - adding
the IDs to Coffee Lake ID list.

More support and features will be in the patches that follow.

v2: Split IDs according to GT. (Rodrigo)

v3: Update IDs.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: default avatarAnusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318200133.9666-1-anusha.srivatsa@intel.com
parent 06dd94cc
...@@ -795,6 +795,8 @@ static const struct pci_device_id pciidlist[] = { ...@@ -795,6 +795,8 @@ static const struct pci_device_id pciidlist[] = {
INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info), INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info),
INTEL_AML_CFL_GT2_IDS(&intel_coffeelake_gt2_info), INTEL_AML_CFL_GT2_IDS(&intel_coffeelake_gt2_info),
INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info), INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
INTEL_CML_GT1_IDS(&intel_coffeelake_gt1_info),
INTEL_CML_GT2_IDS(&intel_coffeelake_gt2_info),
INTEL_CNL_IDS(&intel_cannonlake_info), INTEL_CNL_IDS(&intel_cannonlake_info),
INTEL_ICL_11_IDS(&intel_icelake_11_info), INTEL_ICL_11_IDS(&intel_icelake_11_info),
{0, 0, 0} {0, 0, 0}
......
...@@ -373,6 +373,30 @@ ...@@ -373,6 +373,30 @@
#define INTEL_AML_CFL_GT2_IDS(info) \ #define INTEL_AML_CFL_GT2_IDS(info) \
INTEL_VGA_DEVICE(0x87CA, info) INTEL_VGA_DEVICE(0x87CA, info)
/* CML GT1 */
#define INTEL_CML_GT1_IDS(info) \
INTEL_VGA_DEVICE(0x9B21, info), \
INTEL_VGA_DEVICE(0x9BAA, info), \
INTEL_VGA_DEVICE(0x9BAB, info), \
INTEL_VGA_DEVICE(0x9BAC, info), \
INTEL_VGA_DEVICE(0x9BA0, info), \
INTEL_VGA_DEVICE(0x9BA5, info), \
INTEL_VGA_DEVICE(0x9BA8, info), \
INTEL_VGA_DEVICE(0x9BA4, info), \
INTEL_VGA_DEVICE(0x9BA2, info)
/* CML GT2 */
#define INTEL_CML_GT2_IDS(info) \
INTEL_VGA_DEVICE(0x9B41, info), \
INTEL_VGA_DEVICE(0x9BCA, info), \
INTEL_VGA_DEVICE(0x9BCB, info), \
INTEL_VGA_DEVICE(0x9BCC, info), \
INTEL_VGA_DEVICE(0x9BC0, info), \
INTEL_VGA_DEVICE(0x9BC5, info), \
INTEL_VGA_DEVICE(0x9BC8, info), \
INTEL_VGA_DEVICE(0x9BC4, info), \
INTEL_VGA_DEVICE(0x9BC2, info)
#define INTEL_KBL_IDS(info) \ #define INTEL_KBL_IDS(info) \
INTEL_KBL_GT1_IDS(info), \ INTEL_KBL_GT1_IDS(info), \
INTEL_KBL_GT2_IDS(info), \ INTEL_KBL_GT2_IDS(info), \
...@@ -436,7 +460,9 @@ ...@@ -436,7 +460,9 @@
INTEL_WHL_U_GT1_IDS(info), \ INTEL_WHL_U_GT1_IDS(info), \
INTEL_WHL_U_GT2_IDS(info), \ INTEL_WHL_U_GT2_IDS(info), \
INTEL_WHL_U_GT3_IDS(info), \ INTEL_WHL_U_GT3_IDS(info), \
INTEL_AML_CFL_GT2_IDS(info) INTEL_AML_CFL_GT2_IDS(info), \
INTEL_CML_GT1_IDS(info), \
INTEL_CML_GT2_IDS(info)
/* CNL */ /* CNL */
#define INTEL_CNL_IDS(info) \ #define INTEL_CNL_IDS(info) \
......
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