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Commit a869057c authored by Oswald Buddenhagen's avatar Oswald Buddenhagen Committed by Takashi Iwai
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ALSA: emu10k1: comment updates 

Move comments to better locations, de-duplicate, fix/remove incorrect/
outdated ones, add new ones, and unify spacing somewhat.

While at it, also add testing credits for Jonathan Dowland (SB Live!
Platinum) and myself (E-MU 0404b).
Signed-off-by: default avatarOswald Buddenhagen <oswald.buddenhagen@gmx.de>
Link: https://lore.kernel.org/r/20230422161021.1143903-2-oswald.buddenhagen@gmx.deSigned-off-by: default avatarTakashi Iwai <tiwai@suse.de>
parent 6fb861bb
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Showing with 312 additions and 340 deletions
include/sound/emu10k1.h
View file @ a869057c
This diff is collapsed.
include/uapi/sound/emu10k1.h
View file @ a869057c
......@@ -111,6 +111,9 @@
#define CC_REG_NONZERO C_00000100
/* FX buses */
// These are arbitrary mappings; our DSP code simply expects
// the config files to route the channels this way.
// The numbers are documented in {audigy,sb-live}-mixer.rst.
#define FXBUS_PCM_LEFT 0x00
#define FXBUS_PCM_RIGHT 0x01
#define FXBUS_PCM_LEFT_REAR 0x02
......
sound/pci/emu10k1/emu10k1.c
View file @ a869057c
......@@ -68,17 +68,6 @@ static const struct pci_device_id snd_emu10k1_ids[] = {
{ 0, }
};
/*
* Audigy 2 Value notes:
* A_IOCFG Input (GPIO)
* 0x400 = Front analog jack plugged in. (Green socket)
* 0x1000 = Read analog jack plugged in. (Black socket)
* 0x2000 = Center/LFE analog jack plugged in. (Orange socket)
* A_IOCFG Output (GPIO)
* 0x60 = Sound out of front Left.
* Win sets it to 0xXX61
*/
MODULE_DEVICE_TABLE(pci, snd_emu10k1_ids);
static int snd_card_emu10k1_probe(struct pci_dev *pci,
......
sound/pci/emu10k1/emu10k1_main.c
View file @ a869057c
......@@ -162,6 +162,8 @@ static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir)
outl(0, emu->port + INTE);
snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
/* disable stop on loop end */
snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
......@@ -660,13 +662,14 @@ static int snd_emu1010_load_firmware_entry(struct snd_emu10k1 *emu,
return -EIO;
/* The FPGA is a Xilinx Spartan IIE XC2S50E */
/* On E-MU 0404b it is a Xilinx Spartan III XC3S50 */
/* GPIO7 -> FPGA PGMN
* GPIO6 -> FPGA CCLK
* GPIO5 -> FPGA DIN
* FPGA CONFIG OFF -> FPGA PGMN
*/
spin_lock_irqsave(&emu->emu_lock, flags);
outw(0x00, emu->port + A_GPIO); /* Set PGMN low for 1uS. */
outw(0x00, emu->port + A_GPIO); /* Set PGMN low for 100uS. */
write_post = inw(emu->port + A_GPIO);
udelay(100);
outw(0x80, emu->port + A_GPIO); /* Leave bit 7 set during netlist setup. */
......@@ -782,7 +785,7 @@ static void emu1010_firmware_work(struct work_struct *work)
} else if (!reg && emu->emu1010.last_reg) {
/* Audio Dock removed */
dev_info(emu->card->dev, "emu1010: Audio Dock detached\n");
/* Unmute all */
/* The hardware auto-mutes all, so we unmute again */
snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
}
......@@ -794,29 +797,6 @@ static void emu1010_firmware_work(struct work_struct *work)
}
/*
* EMU-1010 - details found out from this driver, official MS Win drivers,
* testing the card:
*
* Audigy2 (aka Alice2):
* ---------------------
* * communication over PCI
* * conversion of 32-bit data coming over EMU32 links from HANA FPGA
* to 2 x 16-bit, using internal DSP instructions
* * slave mode, clock supplied by HANA
* * linked to HANA using:
* 32 x 32-bit serial EMU32 output channels
* 16 x EMU32 input channels
* (?) x I2S I/O channels (?)
*
* FPGA (aka HANA):
* ---------------
* * provides all (?) physical inputs and outputs of the card
* (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
* * provides clock signal for the card and Alice2
* * two crystals - for 44.1kHz and 48kHz multiples
* * provides internal routing of signal sources to signal destinations
* * inputs/outputs to Alice2 - see above
*
* Current status of the driver:
* ----------------------------
* * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
......@@ -884,11 +864,8 @@ static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
/* Optical -> ADAT I/O */
/* 0 : SPDIF
* 1 : ADAT
*/
emu->emu1010.optical_in = 1; /* IN_ADAT */
emu->emu1010.optical_out = 1; /* IN_ADAT */
emu->emu1010.optical_out = 1; /* OUT_ADAT */
tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
(emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
......@@ -1279,6 +1256,15 @@ static const struct snd_emu_chip_details emu_chip_details[] = {
* AC97: STAC9750
* CA0151: None
*/
/*
* A_IOCFG Input (GPIO)
* 0x400 = Front analog jack plugged in. (Green socket)
* 0x1000 = Rear analog jack plugged in. (Black socket)
* 0x2000 = Center/LFE analog jack plugged in. (Orange socket)
* A_IOCFG Output (GPIO)
* 0x60 = Sound out of front Left.
* Win sets it to 0xXX61
*/
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
.driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
.id = "Audigy2",
......@@ -1327,6 +1313,9 @@ static const struct snd_emu_chip_details emu_chip_details[] = {
.spi_dac = 1,
.i2c_adc = 1,
.spk71 = 1} ,
/* This is MAEM8950 "Mana" */
/* Attach MicroDock[M] to make it an E-MU 1616[m]. */
/* Does NOT support sync daughter card (obviously). */
/* Tested by James@superbug.co.uk 4th Nov 2007. */
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
.driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
......@@ -1337,7 +1326,10 @@ static const struct snd_emu_chip_details emu_chip_details[] = {
.spk71 = 1 ,
.emu_model = EMU_MODEL_EMU1616},
/* Tested by James@superbug.co.uk 4th Nov 2007. */
/* This is MAEM8960, 0202 is MAEM 8980 */
/* This is MAEM8960 "Hana3", 0202 is MAEM8980 */
/* Attach 0202 daughter card to make it an E-MU 1212m, OR a
* MicroDock[M] to make it an E-MU 1616[m]. */
/* Does NOT support sync daughter card. */
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
.driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]",
.id = "EMU1010",
......@@ -1347,6 +1339,11 @@ static const struct snd_emu_chip_details emu_chip_details[] = {
.emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
/* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */
/* This is MAEM8986, 0202 is MAEM8980 */
/* Attach 0202 daughter card to make it an E-MU 1212m, OR a
* MicroDockM to make it an E-MU 1616m. The non-m
* version was never sold with this card, but should
* still work. */
/* Does NOT support sync daughter card. */
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
.driver = "Audigy2", .name = "E-mu 1010 PCIe [MAEM8986]",
.id = "EMU1010",
......@@ -1355,7 +1352,10 @@ static const struct snd_emu_chip_details emu_chip_details[] = {
.spk71 = 1,
.emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
/* Tested by James@superbug.co.uk 8th July 2005. */
/* This is MAEM8810, 0202 is MAEM8820 */
/* This is MAEM8810 "Hana", 0202 is MAEM8820 "Hamoa" */
/* Attach 0202 daughter card to make it an E-MU 1212m, OR an
* AudioDock[M] to make it an E-MU 1820[m]. */
/* Supports sync daughter card. */
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
.driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]",
.id = "EMU1010",
......@@ -1363,7 +1363,9 @@ static const struct snd_emu_chip_details emu_chip_details[] = {
.ca0102_chip = 1,
.spk71 = 1,
.emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
/* EMU0404b */
/* This is MAEM8852 "HanaLiteLite" */
/* Supports sync daughter card. */
/* Tested by oswald.buddenhagen@gmx.de Mar 2023. */
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
.driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]",
.id = "EMU0404",
......@@ -1371,6 +1373,8 @@ static const struct snd_emu_chip_details emu_chip_details[] = {
.ca0108_chip = 1,
.spk71 = 1,
.emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
/* This is MAEM8850 "HanaLite" */
/* Supports sync daughter card. */
/* Tested by James@superbug.co.uk 20-3-2007. */
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
.driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]",
......@@ -1380,6 +1384,7 @@ static const struct snd_emu_chip_details emu_chip_details[] = {
.spk71 = 1,
.emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
/* EMU0404 PCIe */
/* Does NOT support sync daughter card. */
{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
.driver = "Audigy2", .name = "E-mu 0404 PCIe [MAEM8984]",
.id = "EMU0404",
......@@ -1387,7 +1392,6 @@ static const struct snd_emu_chip_details emu_chip_details[] = {
.ca0108_chip = 1,
.spk71 = 1,
.emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
/* Note that all E-mu cards require kernel 2.6 or newer. */
{.vendor = 0x1102, .device = 0x0008,
.driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
.id = "Audigy2",
......@@ -1468,6 +1472,8 @@ static const struct snd_emu_chip_details emu_chip_details[] = {
.spdif_bug = 1,
.adc_1361t = 1, /* 24 bit capture instead of 16bit */
.ac97_chip = 1} ,
/* Audigy 2 Platinum EX */
/* Win driver sets A_IOCFG output to 0x1c00 */
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
.driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]",
.id = "Audigy2",
......@@ -1488,6 +1494,8 @@ static const struct snd_emu_chip_details emu_chip_details[] = {
.spdif_bug = 1,
.invert_shared_spdif = 1, /* digital/analog switch swapped */
.ac97_chip = 1} ,
/* Audigy 2 Platinum */
/* Win driver sets A_IOCFG output to 0xa00 */
{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
.driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
.id = "Audigy2",
......@@ -1593,6 +1601,9 @@ static const struct snd_emu_chip_details emu_chip_details[] = {
.emu10k1_chip = 1,
.ac97_chip = 1,
.sblive51 = 1} ,
/* SB Live! Platinum */
/* Win driver sets A_IOCFG output to 0 */
/* Tested by Jonathan Dowland <jon@dow.land> Apr 2023. */
{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
.driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
.id = "Live",
......
sound/pci/emu10k1/emufx.c
View file @ a869057c
......@@ -1187,8 +1187,8 @@ snd_emu10k1_init_stereo_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl
}
/*
* Used for emu1010 - conversion from 32-bit capture inputs from HANA
* to 2 x 16-bit registers in audigy - their values are read via DMA.
* Used for emu1010 - conversion from 32-bit capture inputs from the FPGA
* to 2 x 16-bit registers in Audigy - their values are read via DMA.
* Conversion is performed by Audigy DSP instructions of FX8010.
*/
static int snd_emu10k1_audigy_dsp_convert_32_to_2x16(
......@@ -1330,8 +1330,9 @@ static int _snd_emu10k1_audigy_init_efx(struct snd_emu10k1 *emu)
#define A_ADD_VOLUME_IN(var,vol,input) \
A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input))
/* emu1212 DSP 0 and DSP 1 Capture */
if (emu->card_capabilities->emu_model) {
/* EMU1010 DSP 0 and DSP 1 Capture */
// The 24 MSB hold the actual value. We implicitly discard the 16 LSB.
if (emu->card_capabilities->ca0108_chip) {
/* Note:JCD:No longer bit shift lower 16bits to upper 16bits of 32bit value. */
A_OP(icode, &ptr, iMACINT0, A_GPR(tmp), A_C_00000000, A3_EMU32IN(0x0), A_C_00000001);
......@@ -1636,8 +1637,11 @@ A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input))
#endif
if (emu->card_capabilities->emu_model) {
/* Capture 16 channels of S32_LE sound. */
if (emu->card_capabilities->ca0108_chip) {
dev_info(emu->card->dev, "EMU2 inputs on\n");
/* Note that the Tina[2] DSPs have 16 more EMU32 inputs which we don't use. */
for (z = 0; z < 0x10; z++) {
snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp,
bit_shifter16,
......@@ -1646,7 +1650,7 @@ A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input))
}
} else {
dev_info(emu->card->dev, "EMU inputs on\n");
/* Capture 16 (originally 8) channels of S32_LE sound */
/* Note that the Alice2 DSPs have 6 I2S inputs which we don't use. */
/*
dev_dbg(emu->card->dev, "emufx.c: gpr=0x%x, tmp=0x%x\n",
......
sound/pci/emu10k1/emumixer.c
View file @ a869057c
......@@ -346,7 +346,7 @@ static const unsigned int emu1616_output_dst[] = {
};
/*
* Data destinations - HANA outputs going to Alice2 (audigy) for
* Data destinations - FPGA outputs going to Alice2 (Audigy) for
* capture (EMU32 + I2S links)
* Each destination has an enum mixer control to choose a data source
*/
......@@ -367,6 +367,7 @@ static const unsigned int emu1010_input_dst[] = {
EMU_DST_ALICE2_EMU32_D,
EMU_DST_ALICE2_EMU32_E,
EMU_DST_ALICE2_EMU32_F,
/* These exist only on rev1 EMU1010 cards. */
EMU_DST_ALICE_I2S0_LEFT,
EMU_DST_ALICE_I2S0_RIGHT,
EMU_DST_ALICE_I2S1_LEFT,
......@@ -708,7 +709,7 @@ static int snd_emu1010_internal_clock_put(struct snd_kcontrol *kcontrol,
/* 44100 */
/* Mute all */
snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_MUTE );
/* Default fallback clock 48kHz */
/* Default fallback clock 44.1kHz */
snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_44_1K );
/* Word Clock source, Internal 44.1kHz x1 */
snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK,
......
sound/pci/emu10k1/emupcm.c
View file @ a869057c
......@@ -326,7 +326,6 @@ static void snd_emu10k1_pcm_init_voice(struct snd_emu10k1 *emu,
} else
snd_emu10k1_ptr_write(emu, FXRT, voice,
snd_emu10k1_compose_send_routing(send_routing));
/* Stop CA */
/* Assumption that PT is already 0 so no harm overwriting */
snd_emu10k1_ptr_write(emu, PTRX, voice, (send_amount[0] << 8) | send_amount[1]);
snd_emu10k1_ptr_write(emu, DSL, voice, end_addr | (send_amount[3] << 24));
......@@ -480,9 +479,6 @@ static int snd_emu10k1_efx_playback_prepare(struct snd_pcm_substream *substream)
start_addr = epcm->start_addr;
end_addr = epcm->start_addr + snd_pcm_lib_buffer_bytes(substream);
/*
* the kX driver leaves some space between voices
*/
channel_size = ( end_addr - start_addr ) / NUM_EFX_PLAYBACK;
snd_emu10k1_pcm_init_voice(emu, 1, 1, epcm->extra,
......@@ -1218,9 +1214,7 @@ static int snd_emu10k1_capture_efx_open(struct snd_pcm_substream *substream)
runtime->hw.rate_min = runtime->hw.rate_max = 48000;
spin_lock_irq(&emu->reg_lock);
if (emu->card_capabilities->emu_model) {
/* Nb. of channels has been increased to 16 */
/* TODO
* SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE
* SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
* SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |
* SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000
......@@ -1231,13 +1225,14 @@ static int snd_emu10k1_capture_efx_open(struct snd_pcm_substream *substream)
* Need to add mixer control to fix sample rate
*
* There are 32 mono channels of 16bits each.
* 24bit Audio uses 2x channels over 16bit
* 96kHz uses 2x channels over 48kHz
* 192kHz uses 4x channels over 48kHz
* So, for 48kHz 24bit, one has 16 channels
* for 96kHz 24bit, one has 8 channels
* for 192kHz 24bit, one has 4 channels
*
* 24bit Audio uses 2x channels over 16bit,
* 96kHz uses 2x channels over 48kHz,
* 192kHz uses 4x channels over 48kHz.
* So, for 48kHz 24bit, one has 16 channels,
* for 96kHz 24bit, one has 8 channels,
* for 192kHz 24bit, one has 4 channels.
* 1010rev2 and 1616(m) cards have double that,
* but we don't exceed 16 channels anyway.
*/
#if 1
switch (emu->emu1010.internal_clock) {
......@@ -1459,11 +1454,12 @@ static int snd_emu10k1_pcm_efx_voices_mask_put(struct snd_kcontrol *kcontrol, st
nval[idx / 32] |= 1 << (idx % 32);
bits++;
}
// Check that the number of requested channels is a power of two
// not bigger than the number of available channels.
for (idx = 0; idx < nefxb; idx++)
if (1 << idx == bits)
break;
if (idx >= nefxb)
return -EINVAL;
......
sound/pci/emu10k1/io.c
View file @ a869057c
......@@ -314,7 +314,6 @@ void snd_emu10k1_voice_intr_enable(struct snd_emu10k1 *emu, unsigned int voicenu
unsigned int val;
spin_lock_irqsave(&emu->emu_lock, flags);
/* voice interrupt */
if (voicenum >= 32) {
outl(CLIEH << 16, emu->port + PTR);
val = inl(emu->port + DATA);
......@@ -334,7 +333,6 @@ void snd_emu10k1_voice_intr_disable(struct snd_emu10k1 *emu, unsigned int voicen
unsigned int val;
spin_lock_irqsave(&emu->emu_lock, flags);
/* voice interrupt */
if (voicenum >= 32) {
outl(CLIEH << 16, emu->port + PTR);
val = inl(emu->port + DATA);
......@@ -353,7 +351,6 @@ void snd_emu10k1_voice_intr_ack(struct snd_emu10k1 *emu, unsigned int voicenum)
unsigned long flags;
spin_lock_irqsave(&emu->emu_lock, flags);
/* voice interrupt */
if (voicenum >= 32) {
outl(CLIPH << 16, emu->port + PTR);
voicenum = 1 << (voicenum - 32);
......@@ -371,7 +368,6 @@ void snd_emu10k1_voice_half_loop_intr_enable(struct snd_emu10k1 *emu, unsigned i
unsigned int val;
spin_lock_irqsave(&emu->emu_lock, flags);
/* voice interrupt */
if (voicenum >= 32) {
outl(HLIEH << 16, emu->port + PTR);
val = inl(emu->port + DATA);
......@@ -391,7 +387,6 @@ void snd_emu10k1_voice_half_loop_intr_disable(struct snd_emu10k1 *emu, unsigned
unsigned int val;
spin_lock_irqsave(&emu->emu_lock, flags);
/* voice interrupt */
if (voicenum >= 32) {
outl(HLIEH << 16, emu->port + PTR);
val = inl(emu->port + DATA);
......@@ -410,7 +405,6 @@ void snd_emu10k1_voice_half_loop_intr_ack(struct snd_emu10k1 *emu, unsigned int
unsigned long flags;
spin_lock_irqsave(&emu->emu_lock, flags);
/* voice interrupt */
if (voicenum >= 32) {
outl(HLIPH << 16, emu->port + PTR);
voicenum = 1 << (voicenum - 32);
......@@ -428,7 +422,6 @@ void snd_emu10k1_voice_set_loop_stop(struct snd_emu10k1 *emu, unsigned int voice
unsigned int sol;
spin_lock_irqsave(&emu->emu_lock, flags);
/* voice interrupt */
if (voicenum >= 32) {
outl(SOLEH << 16, emu->port + PTR);
sol = inl(emu->port + DATA);
......@@ -448,7 +441,6 @@ void snd_emu10k1_voice_clear_loop_stop(struct snd_emu10k1 *emu, unsigned int voi
unsigned int sol;
spin_lock_irqsave(&emu->emu_lock, flags);
/* voice interrupt */
if (voicenum >= 32) {
outl(SOLEH << 16, emu->port + PTR);
sol = inl(emu->port + DATA);
......
sound/pci/emu10k1/p16v.h
View file @ a869057c
......@@ -64,7 +64,7 @@
*/
/********************************************************************************************************/
/* Audigy2 P16V pointer-offset register set, accessed through the PTR2 and DATA2 registers */
/* Audigy2 P16V pointer-offset register set, accessed through the PTR2 and DATA2 registers */
/********************************************************************************************************/
/* The sample rate of the SPDIF outputs is set by modifying a register in the EMU10K2 PTR register A_SPDIF_SAMPLERATE.
......
sound/pci/emu10k1/p17v.h
View file @ a869057c
......@@ -6,8 +6,8 @@
*/
/******************************************************************************/
/* Audigy2Value Tina (P17V) pointer-offset register set,
* accessed through the PTR20 and DATA24 registers */
/* Audigy2Value Tina (P17V) pointer-offset register set, */
/* accessed through the PTR2 and DATA2 registers */
/******************************************************************************/
/* 00 - 07: Not used */
......
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