Commit a961d659 authored by Jie Zhang's avatar Jie Zhang Committed by Bryan Wu

Blackfin arch: More explicitly describe what the instructions do in inline assembly.

Signed-off-by: default avatarJie Zhang <jie.zhang@analog.com>
Signed-off-by: default avatarBryan Wu <bryan.wu@analog.com>
parent 561cc18b
...@@ -46,7 +46,7 @@ ...@@ -46,7 +46,7 @@
#endif #endif
#define bfin_read8(addr) ({ \ #define bfin_read8(addr) ({ \
uint8_t __v; \ uint32_t __v; \
__asm__ __volatile__( \ __asm__ __volatile__( \
NOP_PAD_ANOMALY_05000198 \ NOP_PAD_ANOMALY_05000198 \
"%0 = b[%1] (z);" \ "%0 = b[%1] (z);" \
...@@ -56,7 +56,7 @@ ...@@ -56,7 +56,7 @@
__v; }) __v; })
#define bfin_read16(addr) ({ \ #define bfin_read16(addr) ({ \
uint16_t __v; \ uint32_t __v; \
__asm__ __volatile__( \ __asm__ __volatile__( \
NOP_PAD_ANOMALY_05000198 \ NOP_PAD_ANOMALY_05000198 \
"%0 = w[%1] (z);" \ "%0 = w[%1] (z);" \
...@@ -80,7 +80,7 @@ ...@@ -80,7 +80,7 @@
NOP_PAD_ANOMALY_05000198 \ NOP_PAD_ANOMALY_05000198 \
"b[%0] = %1;" \ "b[%0] = %1;" \
: \ : \
: "a" (addr), "d" (val) \ : "a" (addr), "d" ((uint8_t)(val)) \
: "memory" \ : "memory" \
) )
...@@ -89,7 +89,7 @@ ...@@ -89,7 +89,7 @@
NOP_PAD_ANOMALY_05000198 \ NOP_PAD_ANOMALY_05000198 \
"w[%0] = %1;" \ "w[%0] = %1;" \
: \ : \
: "a" (addr), "d" (val) \ : "a" (addr), "d" ((uint16_t)(val)) \
: "memory" \ : "memory" \
) )
......
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