Commit a976835f authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'ntb-5.20' of https://github.com/jonmason/ntb

Pull NTB updates from Jon Mason:
 "Non-Transparent Bridge updates.

  Fix of heap data and clang warnings, support for a new Intel NTB
  device, and NTB EndPoint Function (EPF) support and the various fixes
  for that"

* tag 'ntb-5.20' of https://github.com/jonmason/ntb:
  MAINTAINERS: add PCI Endpoint NTB drivers to NTB files
  NTB: EPF: Tidy up some bounds checks
  NTB: EPF: Fix error code in epf_ntb_bind()
  PCI: endpoint: pci-epf-vntb: reduce several globals to statics
  PCI: endpoint: pci-epf-vntb: fix error handle in epf_ntb_mw_bar_init()
  PCI: endpoint: Fix Kconfig dependency
  NTB: EPF: set pointer addr to null using NULL rather than 0
  Documentation: PCI: extend subheading underline for "lspci output" section
  Documentation: PCI: Use code-block block for scratchpad registers diagram
  Documentation: PCI: Add specification for the PCI vNTB function device
  PCI: endpoint: Support NTB transfer between RC and EP
  NTB: epf: Allow more flexibility in the memory BAR map method
  PCI: designware-ep: Allow pci_epc_set_bar() update inbound map address
  ntb: intel: add GNR support for Intel PCIe gen5 NTB
  NTB: ntb_tool: uninitialized heap data in tool_fn_write()
  ntb: idt: fix clang -Wformat warnings
parents 9872e4a8 e4fe2a2f
...@@ -13,6 +13,8 @@ PCI Endpoint Framework ...@@ -13,6 +13,8 @@ PCI Endpoint Framework
pci-test-howto pci-test-howto
pci-ntb-function pci-ntb-function
pci-ntb-howto pci-ntb-howto
pci-vntb-function
pci-vntb-howto
function/binding/pci-test function/binding/pci-test
function/binding/pci-ntb function/binding/pci-ntb
.. SPDX-License-Identifier: GPL-2.0
=================
PCI vNTB Function
=================
:Author: Frank Li <Frank.Li@nxp.com>
The difference between PCI NTB function and PCI vNTB function is
PCI NTB function need at two endpoint instances and connect HOST1
and HOST2.
PCI vNTB function only use one host and one endpoint(EP), use NTB
connect EP and PCI host
.. code-block:: text
+------------+ +---------------------------------------+
| | | |
+------------+ | +--------------+
| NTB | | | NTB |
| NetDev | | | NetDev |
+------------+ | +--------------+
| NTB | | | NTB |
| Transfer | | | Transfer |
+------------+ | +--------------+
| | | | |
| PCI NTB | | | |
| EPF | | | |
| Driver | | | PCI Virtual |
| | +---------------+ | NTB Driver |
| | | PCI EP NTB |<------>| |
| | | FN Driver | | |
+------------+ +---------------+ +--------------+
| | | | | |
| PCI BUS | <-----> | PCI EP BUS | | Virtual PCI |
| | PCI | | | BUS |
+------------+ +---------------+--------+--------------+
PCI RC PCI EP
Constructs used for Implementing vNTB
=====================================
1) Config Region
2) Self Scratchpad Registers
3) Peer Scratchpad Registers
4) Doorbell (DB) Registers
5) Memory Window (MW)
Config Region:
--------------
It is same as PCI NTB Function driver
Scratchpad Registers:
---------------------
It is appended after Config region.
.. code-block:: text
+--------------------------------------------------+ Base
| |
| |
| |
| Common Config Register |
| |
| |
| |
+-----------------------+--------------------------+ Base + span_offset
| | |
| Peer Span Space | Span Space |
| | |
| | |
+-----------------------+--------------------------+ Base + span_offset
| | | + span_count * 4
| | |
| Span Space | Peer Span Space |
| | |
+-----------------------+--------------------------+
Virtual PCI Pcie Endpoint
NTB Driver NTB Driver
Doorbell Registers:
-------------------
Doorbell Registers are used by the hosts to interrupt each other.
Memory Window:
--------------
Actual transfer of data between the two hosts will happen using the
memory window.
Modeling Constructs:
====================
32-bit BARs.
====== ===============
BAR NO CONSTRUCTS USED
====== ===============
BAR0 Config Region
BAR1 Doorbell
BAR2 Memory Window 1
BAR3 Memory Window 2
BAR4 Memory Window 3
BAR5 Memory Window 4
====== ===============
64-bit BARs.
====== ===============================
BAR NO CONSTRUCTS USED
====== ===============================
BAR0 Config Region + Scratchpad
BAR1
BAR2 Doorbell
BAR3
BAR4 Memory Window 1
BAR5
====== ===============================
.. SPDX-License-Identifier: GPL-2.0
===================================================================
PCI Non-Transparent Bridge (NTB) Endpoint Function (EPF) User Guide
===================================================================
:Author: Frank Li <Frank.Li@nxp.com>
This document is a guide to help users use pci-epf-vntb function driver
and ntb_hw_epf host driver for NTB functionality. The list of steps to
be followed in the host side and EP side is given below. For the hardware
configuration and internals of NTB using configurable endpoints see
Documentation/PCI/endpoint/pci-vntb-function.rst
Endpoint Device
===============
Endpoint Controller Devices
---------------------------
To find the list of endpoint controller devices in the system::
# ls /sys/class/pci_epc/
5f010000.pcie_ep
If PCI_ENDPOINT_CONFIGFS is enabled::
# ls /sys/kernel/config/pci_ep/controllers
5f010000.pcie_ep
Endpoint Function Drivers
-------------------------
To find the list of endpoint function drivers in the system::
# ls /sys/bus/pci-epf/drivers
pci_epf_ntb pci_epf_test pci_epf_vntb
If PCI_ENDPOINT_CONFIGFS is enabled::
# ls /sys/kernel/config/pci_ep/functions
pci_epf_ntb pci_epf_test pci_epf_vntb
Creating pci-epf-vntb Device
----------------------------
PCI endpoint function device can be created using the configfs. To create
pci-epf-vntb device, the following commands can be used::
# mount -t configfs none /sys/kernel/config
# cd /sys/kernel/config/pci_ep/
# mkdir functions/pci_epf_vntb/func1
The "mkdir func1" above creates the pci-epf-ntb function device that will
be probed by pci_epf_vntb driver.
The PCI endpoint framework populates the directory with the following
configurable fields::
# ls functions/pci_epf_ntb/func1
baseclass_code deviceid msi_interrupts pci-epf-ntb.0
progif_code secondary subsys_id vendorid
cache_line_size interrupt_pin msix_interrupts primary
revid subclass_code subsys_vendor_id
The PCI endpoint function driver populates these entries with default values
when the device is bound to the driver. The pci-epf-vntb driver populates
vendorid with 0xffff and interrupt_pin with 0x0001::
# cat functions/pci_epf_vntb/func1/vendorid
0xffff
# cat functions/pci_epf_vntb/func1/interrupt_pin
0x0001
Configuring pci-epf-vntb Device
-------------------------------
The user can configure the pci-epf-vntb device using its configfs entry. In order
to change the vendorid and the deviceid, the following
commands can be used::
# echo 0x1957 > functions/pci_epf_vntb/func1/vendorid
# echo 0x0809 > functions/pci_epf_vntb/func1/deviceid
In order to configure NTB specific attributes, a new sub-directory to func1
should be created::
# mkdir functions/pci_epf_vntb/func1/pci_epf_vntb.0/
The NTB function driver will populate this directory with various attributes
that can be configured by the user::
# ls functions/pci_epf_vntb/func1/pci_epf_vntb.0/
db_count mw1 mw2 mw3 mw4 num_mws
spad_count
A sample configuration for NTB function is given below::
# echo 4 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/db_count
# echo 128 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/spad_count
# echo 1 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/num_mws
# echo 0x100000 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/mw1
A sample configuration for virtual NTB driver for virutal PCI bus::
# echo 0x1957 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/vntb_vid
# echo 0x080A > functions/pci_epf_vntb/func1/pci_epf_vntb.0/vntb_pid
# echo 0x10 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/vbus_number
Binding pci-epf-ntb Device to EP Controller
--------------------------------------------
NTB function device should be attached to PCI endpoint controllers
connected to the host.
# ln -s controllers/5f010000.pcie_ep functions/pci-epf-ntb/func1/primary
Once the above step is completed, the PCI endpoint controllers are ready to
establish a link with the host.
Start the Link
--------------
In order for the endpoint device to establish a link with the host, the _start_
field should be populated with '1'. For NTB, both the PCI endpoint controllers
should establish link with the host (imx8 don't need this steps)::
# echo 1 > controllers/5f010000.pcie_ep/start
RootComplex Device
==================
lspci Output at Host side
-------------------------
Note that the devices listed here correspond to the values populated in
"Creating pci-epf-ntb Device" section above::
# lspci
00:00.0 PCI bridge: Freescale Semiconductor Inc Device 0000 (rev 01)
01:00.0 RAM memory: Freescale Semiconductor Inc Device 0809
Endpoint Device / Virtual PCI bus
=================================
lspci Output at EP Side / Virtual PCI bus
-----------------------------------------
Note that the devices listed here correspond to the values populated in
"Creating pci-epf-ntb Device" section above::
# lspci
10:00.0 Unassigned class [ffff]: Dawicontrol Computersysteme GmbH Device 1234 (rev ff)
Using ntb_hw_epf Device
-----------------------
The host side software follows the standard NTB software architecture in Linux.
All the existing client side NTB utilities like NTB Transport Client and NTB
Netdev, NTB Ping Pong Test Client and NTB Tool Test Client can be used with NTB
function device.
For more information on NTB see
:doc:`Non-Transparent Bridge <../../driver-api/ntb>`
...@@ -14468,6 +14468,7 @@ W: https://github.com/jonmason/ntb/wiki ...@@ -14468,6 +14468,7 @@ W: https://github.com/jonmason/ntb/wiki
T: git git://github.com/jonmason/ntb.git T: git git://github.com/jonmason/ntb.git
F: drivers/net/ntb_netdev.c F: drivers/net/ntb_netdev.c
F: drivers/ntb/ F: drivers/ntb/
F: drivers/pci/endpoint/functions/pci-epf-*ntb.c
F: include/linux/ntb.h F: include/linux/ntb.h
F: include/linux/ntb_transport.h F: include/linux/ntb_transport.h
F: tools/testing/selftests/ntb/ F: tools/testing/selftests/ntb/
......
...@@ -45,7 +45,6 @@ ...@@ -45,7 +45,6 @@
#define NTB_EPF_MIN_DB_COUNT 3 #define NTB_EPF_MIN_DB_COUNT 3
#define NTB_EPF_MAX_DB_COUNT 31 #define NTB_EPF_MAX_DB_COUNT 31
#define NTB_EPF_MW_OFFSET 2
#define NTB_EPF_COMMAND_TIMEOUT 1000 /* 1 Sec */ #define NTB_EPF_COMMAND_TIMEOUT 1000 /* 1 Sec */
...@@ -67,6 +66,7 @@ struct ntb_epf_dev { ...@@ -67,6 +66,7 @@ struct ntb_epf_dev {
enum pci_barno ctrl_reg_bar; enum pci_barno ctrl_reg_bar;
enum pci_barno peer_spad_reg_bar; enum pci_barno peer_spad_reg_bar;
enum pci_barno db_reg_bar; enum pci_barno db_reg_bar;
enum pci_barno mw_bar;
unsigned int mw_count; unsigned int mw_count;
unsigned int spad_count; unsigned int spad_count;
...@@ -92,6 +92,8 @@ struct ntb_epf_data { ...@@ -92,6 +92,8 @@ struct ntb_epf_data {
enum pci_barno peer_spad_reg_bar; enum pci_barno peer_spad_reg_bar;
/* BAR that contains Doorbell region and Memory window '1' */ /* BAR that contains Doorbell region and Memory window '1' */
enum pci_barno db_reg_bar; enum pci_barno db_reg_bar;
/* BAR that contains memory windows*/
enum pci_barno mw_bar;
}; };
static int ntb_epf_send_command(struct ntb_epf_dev *ndev, u32 command, static int ntb_epf_send_command(struct ntb_epf_dev *ndev, u32 command,
...@@ -411,7 +413,7 @@ static int ntb_epf_mw_set_trans(struct ntb_dev *ntb, int pidx, int idx, ...@@ -411,7 +413,7 @@ static int ntb_epf_mw_set_trans(struct ntb_dev *ntb, int pidx, int idx,
return -EINVAL; return -EINVAL;
} }
bar = idx + NTB_EPF_MW_OFFSET; bar = idx + ndev->mw_bar;
mw_size = pci_resource_len(ntb->pdev, bar); mw_size = pci_resource_len(ntb->pdev, bar);
...@@ -453,7 +455,7 @@ static int ntb_epf_peer_mw_get_addr(struct ntb_dev *ntb, int idx, ...@@ -453,7 +455,7 @@ static int ntb_epf_peer_mw_get_addr(struct ntb_dev *ntb, int idx,
if (idx == 0) if (idx == 0)
offset = readl(ndev->ctrl_reg + NTB_EPF_MW1_OFFSET); offset = readl(ndev->ctrl_reg + NTB_EPF_MW1_OFFSET);
bar = idx + NTB_EPF_MW_OFFSET; bar = idx + ndev->mw_bar;
if (base) if (base)
*base = pci_resource_start(ndev->ntb.pdev, bar) + offset; *base = pci_resource_start(ndev->ntb.pdev, bar) + offset;
...@@ -565,6 +567,7 @@ static int ntb_epf_init_pci(struct ntb_epf_dev *ndev, ...@@ -565,6 +567,7 @@ static int ntb_epf_init_pci(struct ntb_epf_dev *ndev,
struct pci_dev *pdev) struct pci_dev *pdev)
{ {
struct device *dev = ndev->dev; struct device *dev = ndev->dev;
size_t spad_sz, spad_off;
int ret; int ret;
pci_set_drvdata(pdev, ndev); pci_set_drvdata(pdev, ndev);
...@@ -599,10 +602,16 @@ static int ntb_epf_init_pci(struct ntb_epf_dev *ndev, ...@@ -599,10 +602,16 @@ static int ntb_epf_init_pci(struct ntb_epf_dev *ndev,
goto err_dma_mask; goto err_dma_mask;
} }
ndev->peer_spad_reg = pci_iomap(pdev, ndev->peer_spad_reg_bar, 0); if (ndev->peer_spad_reg_bar) {
if (!ndev->peer_spad_reg) { ndev->peer_spad_reg = pci_iomap(pdev, ndev->peer_spad_reg_bar, 0);
ret = -EIO; if (!ndev->peer_spad_reg) {
goto err_dma_mask; ret = -EIO;
goto err_dma_mask;
}
} else {
spad_sz = 4 * readl(ndev->ctrl_reg + NTB_EPF_SPAD_COUNT);
spad_off = readl(ndev->ctrl_reg + NTB_EPF_SPAD_OFFSET);
ndev->peer_spad_reg = ndev->ctrl_reg + spad_off + spad_sz;
} }
ndev->db_reg = pci_iomap(pdev, ndev->db_reg_bar, 0); ndev->db_reg = pci_iomap(pdev, ndev->db_reg_bar, 0);
...@@ -657,6 +666,7 @@ static int ntb_epf_pci_probe(struct pci_dev *pdev, ...@@ -657,6 +666,7 @@ static int ntb_epf_pci_probe(struct pci_dev *pdev,
enum pci_barno peer_spad_reg_bar = BAR_1; enum pci_barno peer_spad_reg_bar = BAR_1;
enum pci_barno ctrl_reg_bar = BAR_0; enum pci_barno ctrl_reg_bar = BAR_0;
enum pci_barno db_reg_bar = BAR_2; enum pci_barno db_reg_bar = BAR_2;
enum pci_barno mw_bar = BAR_2;
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
struct ntb_epf_data *data; struct ntb_epf_data *data;
struct ntb_epf_dev *ndev; struct ntb_epf_dev *ndev;
...@@ -671,17 +681,16 @@ static int ntb_epf_pci_probe(struct pci_dev *pdev, ...@@ -671,17 +681,16 @@ static int ntb_epf_pci_probe(struct pci_dev *pdev,
data = (struct ntb_epf_data *)id->driver_data; data = (struct ntb_epf_data *)id->driver_data;
if (data) { if (data) {
if (data->peer_spad_reg_bar) peer_spad_reg_bar = data->peer_spad_reg_bar;
peer_spad_reg_bar = data->peer_spad_reg_bar; ctrl_reg_bar = data->ctrl_reg_bar;
if (data->ctrl_reg_bar) db_reg_bar = data->db_reg_bar;
ctrl_reg_bar = data->ctrl_reg_bar; mw_bar = data->mw_bar;
if (data->db_reg_bar)
db_reg_bar = data->db_reg_bar;
} }
ndev->peer_spad_reg_bar = peer_spad_reg_bar; ndev->peer_spad_reg_bar = peer_spad_reg_bar;
ndev->ctrl_reg_bar = ctrl_reg_bar; ndev->ctrl_reg_bar = ctrl_reg_bar;
ndev->db_reg_bar = db_reg_bar; ndev->db_reg_bar = db_reg_bar;
ndev->mw_bar = mw_bar;
ndev->dev = dev; ndev->dev = dev;
ntb_epf_init_struct(ndev, pdev); ntb_epf_init_struct(ndev, pdev);
...@@ -729,6 +738,14 @@ static const struct ntb_epf_data j721e_data = { ...@@ -729,6 +738,14 @@ static const struct ntb_epf_data j721e_data = {
.ctrl_reg_bar = BAR_0, .ctrl_reg_bar = BAR_0,
.peer_spad_reg_bar = BAR_1, .peer_spad_reg_bar = BAR_1,
.db_reg_bar = BAR_2, .db_reg_bar = BAR_2,
.mw_bar = BAR_2,
};
static const struct ntb_epf_data mx8_data = {
.ctrl_reg_bar = BAR_0,
.peer_spad_reg_bar = BAR_0,
.db_reg_bar = BAR_2,
.mw_bar = BAR_4,
}; };
static const struct pci_device_id ntb_epf_pci_tbl[] = { static const struct pci_device_id ntb_epf_pci_tbl[] = {
...@@ -737,6 +754,11 @@ static const struct pci_device_id ntb_epf_pci_tbl[] = { ...@@ -737,6 +754,11 @@ static const struct pci_device_id ntb_epf_pci_tbl[] = {
.class = PCI_CLASS_MEMORY_RAM << 8, .class_mask = 0xffff00, .class = PCI_CLASS_MEMORY_RAM << 8, .class_mask = 0xffff00,
.driver_data = (kernel_ulong_t)&j721e_data, .driver_data = (kernel_ulong_t)&j721e_data,
}, },
{
PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x0809),
.class = PCI_CLASS_MEMORY_RAM << 8, .class_mask = 0xffff00,
.driver_data = (kernel_ulong_t)&mx8_data,
},
{ }, { },
}; };
......
...@@ -2406,7 +2406,7 @@ static ssize_t idt_dbgfs_info_read(struct file *filp, char __user *ubuf, ...@@ -2406,7 +2406,7 @@ static ssize_t idt_dbgfs_info_read(struct file *filp, char __user *ubuf,
"\t%hhu.\t", idx); "\t%hhu.\t", idx);
else else
off += scnprintf(strbuf + off, size - off, off += scnprintf(strbuf + off, size - off,
"\t%hhu-%hhu.\t", idx, idx + cnt - 1); "\t%hhu-%d.\t", idx, idx + cnt - 1);
off += scnprintf(strbuf + off, size - off, "%s BAR%hhu, ", off += scnprintf(strbuf + off, size - off, "%s BAR%hhu, ",
idt_get_mw_name(data), ndev->mws[idx].bar); idt_get_mw_name(data), ndev->mws[idx].bar);
...@@ -2435,7 +2435,7 @@ static ssize_t idt_dbgfs_info_read(struct file *filp, char __user *ubuf, ...@@ -2435,7 +2435,7 @@ static ssize_t idt_dbgfs_info_read(struct file *filp, char __user *ubuf,
"\t%hhu.\t", idx); "\t%hhu.\t", idx);
else else
off += scnprintf(strbuf + off, size - off, off += scnprintf(strbuf + off, size - off,
"\t%hhu-%hhu.\t", idx, idx + cnt - 1); "\t%hhu-%d.\t", idx, idx + cnt - 1);
off += scnprintf(strbuf + off, size - off, off += scnprintf(strbuf + off, size - off,
"%s BAR%hhu, ", idt_get_mw_name(data), "%s BAR%hhu, ", idt_get_mw_name(data),
...@@ -2480,7 +2480,7 @@ static ssize_t idt_dbgfs_info_read(struct file *filp, char __user *ubuf, ...@@ -2480,7 +2480,7 @@ static ssize_t idt_dbgfs_info_read(struct file *filp, char __user *ubuf,
int src; int src;
data = idt_ntb_msg_read(&ndev->ntb, &src, idx); data = idt_ntb_msg_read(&ndev->ntb, &src, idx);
off += scnprintf(strbuf + off, size - off, off += scnprintf(strbuf + off, size - off,
"\t%hhu. 0x%08x from peer %hhu (Port %hhu)\n", "\t%hhu. 0x%08x from peer %d (Port %hhu)\n",
idx, data, src, ndev->peers[src].port); idx, data, src, ndev->peers[src].port);
} }
off += scnprintf(strbuf + off, size - off, "\n"); off += scnprintf(strbuf + off, size - off, "\n");
......
...@@ -763,7 +763,7 @@ static ssize_t ndev_debugfs_read(struct file *filp, char __user *ubuf, ...@@ -763,7 +763,7 @@ static ssize_t ndev_debugfs_read(struct file *filp, char __user *ubuf,
return ndev_ntb_debugfs_read(filp, ubuf, count, offp); return ndev_ntb_debugfs_read(filp, ubuf, count, offp);
else if (pdev_is_gen3(ndev->ntb.pdev)) else if (pdev_is_gen3(ndev->ntb.pdev))
return ndev_ntb3_debugfs_read(filp, ubuf, count, offp); return ndev_ntb3_debugfs_read(filp, ubuf, count, offp);
else if (pdev_is_gen4(ndev->ntb.pdev)) else if (pdev_is_gen4(ndev->ntb.pdev) || pdev_is_gen5(ndev->ntb.pdev))
return ndev_ntb4_debugfs_read(filp, ubuf, count, offp); return ndev_ntb4_debugfs_read(filp, ubuf, count, offp);
return -ENXIO; return -ENXIO;
...@@ -1874,7 +1874,7 @@ static int intel_ntb_pci_probe(struct pci_dev *pdev, ...@@ -1874,7 +1874,7 @@ static int intel_ntb_pci_probe(struct pci_dev *pdev,
rc = gen3_init_dev(ndev); rc = gen3_init_dev(ndev);
if (rc) if (rc)
goto err_init_dev; goto err_init_dev;
} else if (pdev_is_gen4(pdev)) { } else if (pdev_is_gen4(pdev) || pdev_is_gen5(pdev)) {
ndev->ntb.ops = &intel_ntb4_ops; ndev->ntb.ops = &intel_ntb4_ops;
rc = intel_ntb_init_pci(ndev, pdev); rc = intel_ntb_init_pci(ndev, pdev);
if (rc) if (rc)
...@@ -1904,7 +1904,8 @@ static int intel_ntb_pci_probe(struct pci_dev *pdev, ...@@ -1904,7 +1904,8 @@ static int intel_ntb_pci_probe(struct pci_dev *pdev,
err_register: err_register:
ndev_deinit_debugfs(ndev); ndev_deinit_debugfs(ndev);
if (pdev_is_gen1(pdev) || pdev_is_gen3(pdev) || pdev_is_gen4(pdev)) if (pdev_is_gen1(pdev) || pdev_is_gen3(pdev) ||
pdev_is_gen4(pdev) || pdev_is_gen5(pdev))
xeon_deinit_dev(ndev); xeon_deinit_dev(ndev);
err_init_dev: err_init_dev:
intel_ntb_deinit_pci(ndev); intel_ntb_deinit_pci(ndev);
...@@ -1920,7 +1921,8 @@ static void intel_ntb_pci_remove(struct pci_dev *pdev) ...@@ -1920,7 +1921,8 @@ static void intel_ntb_pci_remove(struct pci_dev *pdev)
ntb_unregister_device(&ndev->ntb); ntb_unregister_device(&ndev->ntb);
ndev_deinit_debugfs(ndev); ndev_deinit_debugfs(ndev);
if (pdev_is_gen1(pdev) || pdev_is_gen3(pdev) || pdev_is_gen4(pdev)) if (pdev_is_gen1(pdev) || pdev_is_gen3(pdev) ||
pdev_is_gen4(pdev) || pdev_is_gen5(pdev))
xeon_deinit_dev(ndev); xeon_deinit_dev(ndev);
intel_ntb_deinit_pci(ndev); intel_ntb_deinit_pci(ndev);
kfree(ndev); kfree(ndev);
...@@ -2047,6 +2049,8 @@ static const struct pci_device_id intel_ntb_pci_tbl[] = { ...@@ -2047,6 +2049,8 @@ static const struct pci_device_id intel_ntb_pci_tbl[] = {
/* GEN4 */ /* GEN4 */
{PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_B2B_ICX)}, {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_B2B_ICX)},
/* GEN5 PCIe */
{PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_B2B_GNR)},
{0} {0}
}; };
MODULE_DEVICE_TABLE(pci, intel_ntb_pci_tbl); MODULE_DEVICE_TABLE(pci, intel_ntb_pci_tbl);
......
...@@ -197,7 +197,7 @@ int gen4_init_dev(struct intel_ntb_dev *ndev) ...@@ -197,7 +197,7 @@ int gen4_init_dev(struct intel_ntb_dev *ndev)
ppd1 = ioread32(ndev->self_mmio + GEN4_PPD1_OFFSET); ppd1 = ioread32(ndev->self_mmio + GEN4_PPD1_OFFSET);
if (pdev_is_ICX(pdev)) if (pdev_is_ICX(pdev))
ndev->ntb.topo = gen4_ppd_topo(ndev, ppd1); ndev->ntb.topo = gen4_ppd_topo(ndev, ppd1);
else if (pdev_is_SPR(pdev)) else if (pdev_is_SPR(pdev) || pdev_is_gen5(pdev))
ndev->ntb.topo = spr_ppd_topo(ndev, ppd1); ndev->ntb.topo = spr_ppd_topo(ndev, ppd1);
dev_dbg(&pdev->dev, "ppd %#x topo %s\n", ppd1, dev_dbg(&pdev->dev, "ppd %#x topo %s\n", ppd1,
ntb_topo_string(ndev->ntb.topo)); ntb_topo_string(ndev->ntb.topo));
......
...@@ -70,6 +70,7 @@ ...@@ -70,6 +70,7 @@
#define PCI_DEVICE_ID_INTEL_NTB_SS_BDX 0x6F0F #define PCI_DEVICE_ID_INTEL_NTB_SS_BDX 0x6F0F
#define PCI_DEVICE_ID_INTEL_NTB_B2B_SKX 0x201C #define PCI_DEVICE_ID_INTEL_NTB_B2B_SKX 0x201C
#define PCI_DEVICE_ID_INTEL_NTB_B2B_ICX 0x347e #define PCI_DEVICE_ID_INTEL_NTB_B2B_ICX 0x347e
#define PCI_DEVICE_ID_INTEL_NTB_B2B_GNR 0x0db4
/* Ntb control and link status */ /* Ntb control and link status */
#define NTB_CTL_CFG_LOCK BIT(0) #define NTB_CTL_CFG_LOCK BIT(0)
...@@ -228,4 +229,10 @@ static inline int pdev_is_gen4(struct pci_dev *pdev) ...@@ -228,4 +229,10 @@ static inline int pdev_is_gen4(struct pci_dev *pdev)
return 0; return 0;
} }
static inline int pdev_is_gen5(struct pci_dev *pdev)
{
return pdev->device == PCI_DEVICE_ID_INTEL_NTB_B2B_GNR;
}
#endif #endif
...@@ -367,14 +367,16 @@ static ssize_t tool_fn_write(struct tool_ctx *tc, ...@@ -367,14 +367,16 @@ static ssize_t tool_fn_write(struct tool_ctx *tc,
u64 bits; u64 bits;
int n; int n;
if (*offp)
return 0;
buf = kmalloc(size + 1, GFP_KERNEL); buf = kmalloc(size + 1, GFP_KERNEL);
if (!buf) if (!buf)
return -ENOMEM; return -ENOMEM;
ret = simple_write_to_buffer(buf, size, offp, ubuf, size); if (copy_from_user(buf, ubuf, size)) {
if (ret < 0) {
kfree(buf); kfree(buf);
return ret; return -EFAULT;
} }
buf[size] = 0; buf[size] = 0;
......
...@@ -161,7 +161,11 @@ static int dw_pcie_ep_inbound_atu(struct dw_pcie_ep *ep, u8 func_no, int type, ...@@ -161,7 +161,11 @@ static int dw_pcie_ep_inbound_atu(struct dw_pcie_ep *ep, u8 func_no, int type,
u32 free_win; u32 free_win;
struct dw_pcie *pci = to_dw_pcie_from_ep(ep); struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
free_win = find_first_zero_bit(ep->ib_window_map, pci->num_ib_windows); if (!ep->bar_to_atu[bar])
free_win = find_first_zero_bit(ep->ib_window_map, pci->num_ib_windows);
else
free_win = ep->bar_to_atu[bar];
if (free_win >= pci->num_ib_windows) { if (free_win >= pci->num_ib_windows) {
dev_err(pci->dev, "No free inbound window\n"); dev_err(pci->dev, "No free inbound window\n");
return -EINVAL; return -EINVAL;
...@@ -218,6 +222,7 @@ static void dw_pcie_ep_clear_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no, ...@@ -218,6 +222,7 @@ static void dw_pcie_ep_clear_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
dw_pcie_disable_atu(pci, PCIE_ATU_REGION_DIR_IB, atu_index); dw_pcie_disable_atu(pci, PCIE_ATU_REGION_DIR_IB, atu_index);
clear_bit(atu_index, ep->ib_window_map); clear_bit(atu_index, ep->ib_window_map);
ep->epf_bar[bar] = NULL; ep->epf_bar[bar] = NULL;
ep->bar_to_atu[bar] = 0;
} }
static int dw_pcie_ep_set_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no, static int dw_pcie_ep_set_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
...@@ -245,6 +250,9 @@ static int dw_pcie_ep_set_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no, ...@@ -245,6 +250,9 @@ static int dw_pcie_ep_set_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
if (ret) if (ret)
return ret; return ret;
if (ep->epf_bar[bar])
return 0;
dw_pcie_dbi_ro_wr_en(pci); dw_pcie_dbi_ro_wr_en(pci);
dw_pcie_writel_dbi2(pci, reg, lower_32_bits(size - 1)); dw_pcie_writel_dbi2(pci, reg, lower_32_bits(size - 1));
......
...@@ -25,3 +25,15 @@ config PCI_EPF_NTB ...@@ -25,3 +25,15 @@ config PCI_EPF_NTB
device tree. device tree.
If in doubt, say "N" to disable Endpoint NTB driver. If in doubt, say "N" to disable Endpoint NTB driver.
config PCI_EPF_VNTB
tristate "PCI Endpoint NTB driver"
depends on PCI_ENDPOINT
depends on NTB
select CONFIGFS_FS
help
Select this configuration option to enable the Non-Transparent
Bridge (NTB) driver for PCIe Endpoint. NTB driver implements NTB
between PCI Root Port and PCIe Endpoint.
If in doubt, say "N" to disable Endpoint NTB driver.
...@@ -5,3 +5,4 @@ ...@@ -5,3 +5,4 @@
obj-$(CONFIG_PCI_EPF_TEST) += pci-epf-test.o obj-$(CONFIG_PCI_EPF_TEST) += pci-epf-test.o
obj-$(CONFIG_PCI_EPF_NTB) += pci-epf-ntb.o obj-$(CONFIG_PCI_EPF_NTB) += pci-epf-ntb.o
obj-$(CONFIG_PCI_EPF_VNTB) += pci-epf-vntb.o
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