Commit a9e5b20d authored by Murali Karicheri's avatar Murali Karicheri Committed by Santosh Shilimkar

ARM: dts: keystone: add interrupt property to PCI controller bindings

Now that Keystone PCIe controller supports error interrupt handling
add interrupt property to PCI controller DT bindings to enable
error interrupt handling.
Signed-off-by: default avatarMurali Karicheri <m-karicheri2@ti.com>
Signed-off-by: default avatarSantosh Shilimkar <ssantosh@kernel.org>
parent 59e13aac
......@@ -104,6 +104,8 @@ pcie1: pcie@21020000 {
num-lanes = <2>;
bus-range = <0x00 0xff>;
/* error interrupt */
interrupts = <GIC_SPI 385 IRQ_TYPE_EDGE_RISING>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc1 0>, /* INT A */
......
......@@ -302,6 +302,8 @@ pcie0: pcie@21800000 {
num-lanes = <2>;
bus-range = <0x00 0xff>;
/* error interrupt */
interrupts = <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc0 0>, /* INT A */
......
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