Commit aa5e5dc2 authored by Michael Opdenacker's avatar Michael Opdenacker Committed by Jiri Kosina

treewide: fix "distingush" typo

Signed-off-by: default avatarMichael Opdenacker <michael.opdenacker@free-electrons.com>
Signed-off-by: default avatarJiri Kosina <jkosina@suse.cz>
parent 18f65332
...@@ -45,7 +45,7 @@ static inline void get_new_mmu_context(struct mm_struct *mm) ...@@ -45,7 +45,7 @@ static inline void get_new_mmu_context(struct mm_struct *mm)
Flush all TLB and start new cycle. */ Flush all TLB and start new cycle. */
local_flush_tlb_all(); local_flush_tlb_all();
/* Fix version if needed. /* Fix version if needed.
Note that we avoid version #0 to distingush NO_CONTEXT. */ Note that we avoid version #0 to distinguish NO_CONTEXT. */
if (!mc) if (!mc)
mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION; mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION;
} }
......
...@@ -71,7 +71,7 @@ static inline unsigned long allocate_mmu_context(struct mm_struct *mm) ...@@ -71,7 +71,7 @@ static inline unsigned long allocate_mmu_context(struct mm_struct *mm)
local_flush_tlb_all(); local_flush_tlb_all();
/* fix the TLB version if needed (we avoid version #0 so as to /* fix the TLB version if needed (we avoid version #0 so as to
* distingush MMU_NO_CONTEXT) */ * distinguish MMU_NO_CONTEXT) */
if (!mc) if (!mc)
*pmc = mc = MMU_CONTEXT_FIRST_VERSION; *pmc = mc = MMU_CONTEXT_FIRST_VERSION;
} }
......
...@@ -31,7 +31,7 @@ ...@@ -31,7 +31,7 @@
#define NVRW_CNT 0x20 #define NVRW_CNT 0x20
/* /*
* Set oops header version to distingush between old and new format header. * Set oops header version to distinguish between old and new format header.
* lnx,oops-log partition max size is 4000, header version > 4000 will * lnx,oops-log partition max size is 4000, header version > 4000 will
* help in identifying new header. * help in identifying new header.
*/ */
......
...@@ -81,7 +81,7 @@ static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu) ...@@ -81,7 +81,7 @@ static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu)
/* /*
* Fix version; Note that we avoid version #0 * Fix version; Note that we avoid version #0
* to distingush NO_CONTEXT. * to distinguish NO_CONTEXT.
*/ */
if (!asid) if (!asid)
asid = MMU_CONTEXT_FIRST_VERSION; asid = MMU_CONTEXT_FIRST_VERSION;
......
...@@ -339,7 +339,7 @@ static void amd_get_topology(struct cpuinfo_x86 *c) ...@@ -339,7 +339,7 @@ static void amd_get_topology(struct cpuinfo_x86 *c)
#endif #endif
/* /*
* On a AMD dual core setup the lower bits of the APIC id distingush the cores. * On a AMD dual core setup the lower bits of the APIC id distinguish the cores.
* Assumes number of cores is a power of two. * Assumes number of cores is a power of two.
*/ */
static void amd_detect_cmp(struct cpuinfo_x86 *c) static void amd_detect_cmp(struct cpuinfo_x86 *c)
......
...@@ -1031,7 +1031,7 @@ static void i8042_controller_reset(bool force_reset) ...@@ -1031,7 +1031,7 @@ static void i8042_controller_reset(bool force_reset)
/* /*
* i8042_panic_blink() will turn the keyboard LEDs on or off and is called * i8042_panic_blink() will turn the keyboard LEDs on or off and is called
* when kernel panics. Flashing LEDs is useful for users running X who may * when kernel panics. Flashing LEDs is useful for users running X who may
* not see the console and will help distingushing panics from "real" * not see the console and will help distinguishing panics from "real"
* lockups. * lockups.
* *
* Note that DELAY has a limit of 10ms so we will not get stuck here * Note that DELAY has a limit of 10ms so we will not get stuck here
......
...@@ -49,7 +49,7 @@ ...@@ -49,7 +49,7 @@
* can't distinguish between a clean block that has been generated * can't distinguish between a clean block that has been generated
* from parity calculations, and a clean block that has been * from parity calculations, and a clean block that has been
* successfully written to the spare ( or to parity when resyncing). * successfully written to the spare ( or to parity when resyncing).
* To distingush these states we have a stripe bit STRIPE_INSYNC that * To distinguish these states we have a stripe bit STRIPE_INSYNC that
* is set whenever a write is scheduled to the spare, or to the parity * is set whenever a write is scheduled to the spare, or to the parity
* disc if there is no spare. A sync request clears this bit, and * disc if there is no spare. A sync request clears this bit, and
* when we find it set with no buffers locked, we know the sync is * when we find it set with no buffers locked, we know the sync is
......
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