Commit aa62d661 authored by Andrew Davis's avatar Andrew Davis Committed by Nishanth Menon

arm64: dts: ti: k3-am64: MDIO pinmux should belong to the MDIO node

Although usually integrated as a child of an Ethernet controller, MDIO
IP has an independent pinout. This pinout should be controlled by
the MDIO node (so if it was to be disabled for instance, the pinmux
state would reflect that).

Move the MDIO pins pinmux to the MIDO nodes.
Signed-off-by: default avatarAndrew Davis <afd@ti.com>
Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Reviewed-by: default avatarBryan Brattlof <bb@ti.com>
Acked-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20221017192532.23825-8-afd@ti.com
parent 3e21ec28
......@@ -425,8 +425,7 @@ &usb0 {
&cpsw3g {
pinctrl-names = "default";
pinctrl-0 = <&mdio1_pins_default
&rgmii1_pins_default
pinctrl-0 = <&rgmii1_pins_default
&rgmii2_pins_default>;
};
......@@ -441,6 +440,9 @@ &cpsw_port2 {
};
&cpsw3g_mdio {
pinctrl-names = "default";
pinctrl-0 = <&mdio1_pins_default>;
cpsw3g_phy0: ethernet-phy@0 {
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
......
......@@ -439,8 +439,7 @@ &usb0 {
&cpsw3g {
pinctrl-names = "default";
pinctrl-0 = <&mdio1_pins_default
&rgmii1_pins_default
pinctrl-0 = <&rgmii1_pins_default
&rgmii2_pins_default>;
};
......@@ -455,6 +454,9 @@ &cpsw_port2 {
};
&cpsw3g_mdio {
pinctrl-names = "default";
pinctrl-0 = <&mdio1_pins_default>;
cpsw3g_phy0: ethernet-phy@0 {
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
......
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