staging: rtl8192e: Join constants Rtl819XRadioA_.. with ..RadioA_..

Join constants Rtl819XRadioA_Array with Rtl8192PciERadioA_Array to
RTL8192E_RADIO_A_ARR to improve readability. Fix spaces around '+' to
improve coding style.
Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
Link: https://lore.kernel.org/r/0ce85e55fd9ddd5459590d756a951809b6a1b9ee.1678814935.git.philipp.g.hortmann@gmail.comSigned-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c

@@ -543,13 +543,13 @@ u8 rtl92e_config_rf_path(struct net_device *dev, enum rf90_radio_path eRFPath)
 	switch (eRFPath) {
 	case RF90_PATH_A:
 		for (i = 0; i < RTL8192E_RADIO_A_ARR_LEN; i += 2) {
-			if (Rtl819XRadioA_Array[i] == 0xfe) {
+			if (RTL8192E_RADIO_A_ARR[i] == 0xfe) {
 				msleep(100);
 				continue;
 			}
-			rtl92e_set_rf_reg(dev, eRFPath, Rtl819XRadioA_Array[i],
+			rtl92e_set_rf_reg(dev, eRFPath, RTL8192E_RADIO_A_ARR[i],
 					  bMask12Bits,
-					  Rtl819XRadioA_Array[i+1]);
+					  RTL8192E_RADIO_A_ARR[i + 1]);
 
 		}
 		break;

drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h

@@ -9,7 +9,6 @@
 
 #define MAX_DOZE_WAITING_TIMES_9x 64
 
-#define Rtl819XRadioA_Array			Rtl8192PciERadioA_Array
 #define Rtl819XRadioB_Array			Rtl8192PciERadioB_Array
 #define Rtl819XAGCTAB_Array			Rtl8192PciEAGCTAB_Array
 #define Rtl819XPHY_REG_1T2RArray		Rtl8192PciEPHY_REG_1T2RArray

drivers/staging/rtl8192e/rtl8192e/table.c

@@ -157,7 +157,7 @@ u32 Rtl8192PciEPHY_REG_1T2RArray[RTL8192E_PHY_REG_1T2R_ARR_LEN] = {
 	0xe1c, 0x12121416,
 };
 
-u32 Rtl8192PciERadioA_Array[RTL8192E_RADIO_A_ARR_LEN] = {
+u32 RTL8192E_RADIO_A_ARR[RTL8192E_RADIO_A_ARR_LEN] = {
 	0x019, 0x00000003,
 	0x000, 0x000000bf,
 	0x001, 0x00000ee0,

drivers/staging/rtl8192e/rtl8192e/table.h

@@ -14,7 +14,7 @@
 #define RTL8192E_PHY_REG_1T2R_ARR_LEN 296
 extern u32 Rtl8192PciEPHY_REG_1T2RArray[RTL8192E_PHY_REG_1T2R_ARR_LEN];
 #define RTL8192E_RADIO_A_ARR_LEN 246
-extern u32 Rtl8192PciERadioA_Array[RTL8192E_RADIO_A_ARR_LEN];
+extern u32 RTL8192E_RADIO_A_ARR[RTL8192E_RADIO_A_ARR_LEN];
 #define RTL8192E_RADIO_B_ARR_LEN 78
 extern u32 Rtl8192PciERadioB_Array[RTL8192E_RADIO_B_ARR_LEN];
 #define RTL8192E_MACPHY_ARR_LEN 18