Commit abbd669d authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab

media: atomisp: do another round of coding style cleanup

Run checkpatch --fix-inline again, in order to get rid
of some additional issues that got introduced (or that
checkpatch can now detect).

This should help preventing receiving random cleanups,
while keeping the code on a better shape.
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 1a16d545
......@@ -173,8 +173,8 @@ Limitations
device but can also be extracted from the upgrade kit if you've managed
to lose them somehow.
2. Without a 3A libary the capture behaviour is not very good. To take a good
picture, you need tune ISP parameters by IOCTL functions or use a 3A libary
2. Without a 3A library the capture behaviour is not very good. To take a good
picture, you need tune ISP parameters by IOCTL functions or use a 3A library
such as libxcam.
3. The driver is intended to drive the PCI exposed versions of the device.
......
......@@ -57,7 +57,7 @@ config VIDEO_ATOMISP_GC0310
---help---
This is a Video4Linux2 sensor-level driver for the Galaxycore
GC0310 0.3MP sensor.
config VIDEO_ATOMISP_OV2680
tristate "Omnivision OV2680 sensor support"
depends on ACPI
......
......@@ -1321,7 +1321,6 @@ static int gc0310_probe(struct i2c_client *client)
__func__, acpi_device_bid(adev), acpi_device_hid(adev));
// FIXME: may need to release resources allocated by acpi_bus_get_device()
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (!dev)
return -ENOMEM;
......
......@@ -703,7 +703,7 @@ static int power_ctrl(struct v4l2_subdev *sd, bool flag)
if (!dev || !dev->platform_data)
return -ENODEV;
dev_dbg(&client->dev, "%s: %s", __func__, flag? "on" : "off");
dev_dbg(&client->dev, "%s: %s", __func__, flag ? "on" : "off");
if (flag) {
ret |= dev->platform_data->v1p8_ctrl(sd, 1);
......
......@@ -456,6 +456,7 @@ static struct ov2680_reg const ov2680_656x496_30fps[] = {
// {0x5090, 0x0c},
{}
};
/*
* 800x600 30fps VBlanking 1lane 10Bit (binning)
*/
......@@ -500,6 +501,7 @@ static struct ov2680_reg const ov2680_720x592_30fps[] = {
{0x5081, 0x41},
{}
};
/*
* 800x600 30fps VBlanking 1lane 10Bit (binning)
*/
......
......@@ -1087,7 +1087,7 @@ static int ov5693_s_ctrl(struct v4l2_ctrl *ctrl)
case V4L2_CID_VCM_SLEW:
ret = ov5693_t_vcm_slew(&dev->sd, ctrl->val);
break;
case V4L2_CID_VCM_TIMEING:
case V4L2_CID_VCM_TIMING:
ret = ov5693_t_vcm_timing(&dev->sd, ctrl->val);
break;
default:
......@@ -1230,7 +1230,7 @@ static const struct v4l2_ctrl_config ov5693_controls[] = {
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_VCM_TIMEING,
.id = V4L2_CID_VCM_TIMING,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "vcm step time",
.min = 0,
......
......@@ -29,7 +29,7 @@
#include "ia_css_types.h"
#define mmgr_NULL ((ia_css_ptr)0)
#define mmgr_EXCEPTION ((ia_css_ptr)-1)
#define mmgr_EXCEPTION ((ia_css_ptr) - 1)
int hmm_pool_register(unsigned int pool_size, enum hmm_pool_type pool_type);
void hmm_pool_unregister(enum hmm_pool_type pool_type);
......
......@@ -1274,7 +1274,7 @@ struct atomisp_sensor_ae_bracketing_lut {
/* VCM slew control */
#define V4L2_CID_VCM_SLEW (V4L2_CID_CAMERA_LASTP1 + 11)
/* VCM step time */
#define V4L2_CID_VCM_TIMEING (V4L2_CID_CAMERA_LASTP1 + 12)
#define V4L2_CID_VCM_TIMING (V4L2_CID_CAMERA_LASTP1 + 12)
/* Query Focus Status */
#define V4L2_CID_FOCUS_STATUS (V4L2_CID_CAMERA_LASTP1 + 14)
......
......@@ -6005,10 +6005,9 @@ int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f)
output_info.padded_width, 8);
pipe->pix.sizeimage =
PAGE_ALIGN(f->fmt.pix.height * pipe->pix.bytesperline);
}
dev_dbg(isp->dev, "%s: image size: %d, %d bytes per line\n",
__func__, pipe->pix.sizeimage,pipe-> pix.bytesperline);
__func__, pipe->pix.sizeimage, pipe->pix.bytesperline);
if (f->fmt.pix.field == V4L2_FIELD_ANY)
f->fmt.pix.field = V4L2_FIELD_NONE;
......
......@@ -479,7 +479,6 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev)
if (i >= MAX_SUBDEVS)
return NULL;
if (power) {
gmin_subdevs[i].pwm_i2c_addr = power->addr;
dev_info(dev,
......@@ -616,6 +615,7 @@ static int axp_regulator_set(struct device *dev, struct gmin_subdev *gs,
static int axp_v1p8_on(struct device *dev, struct gmin_subdev *gs)
{
int ret;
ret = axp_regulator_set(dev, gs, gs->eldo2_sel_reg, gs->eldo2_1p8v,
ELDO_CTRL_REG, gs->eldo2_ctrl_shift, true);
if (ret)
......@@ -640,6 +640,7 @@ static int axp_v1p8_on(struct device *dev, struct gmin_subdev *gs)
static int axp_v1p8_off(struct device *dev, struct gmin_subdev *gs)
{
int ret;
ret = axp_regulator_set(dev, gs, gs->eldo1_sel_reg, gs->eldo1_1p8v,
ELDO_CTRL_REG, gs->eldo1_ctrl_shift, false);
if (ret)
......@@ -650,7 +651,6 @@ static int axp_v1p8_off(struct device *dev, struct gmin_subdev *gs)
return ret;
}
static int gmin_gpio0_ctrl(struct v4l2_subdev *subdev, int on)
{
struct gmin_subdev *gs = find_gmin_subdev(subdev);
......@@ -753,7 +753,6 @@ static int gmin_v1p8_ctrl(struct v4l2_subdev *subdev, int on)
dev_err(subdev->dev, "Couldn't set power mode for v1p2\n");
}
return -EINVAL;
}
......
......@@ -1563,7 +1563,7 @@ int atomisp_stream_on_master_slave_sensor(struct atomisp_device *isp,
/* FIXME! ISP2400 */
static void __wdt_on_master_slave_sensor(struct atomisp_device *isp,
unsigned int wdt_duration)
unsigned int wdt_duration)
{
if (atomisp_buffers_queued(&isp->asd[0]))
atomisp_wdt_refresh(&isp->asd[0], wdt_duration);
......@@ -2467,7 +2467,6 @@ static int atomisp_camera_s_ext_ctrls(struct file *file, void *fh,
int i;
int ret = 0;
if (!atomisp_hw_is_isp2401)
motor = isp->inputs[asd->input_curr].motor;
else
......@@ -2484,7 +2483,7 @@ static int atomisp_camera_s_ext_ctrls(struct file *file, void *fh,
case V4L2_CID_EXPOSURE_METERING:
case V4L2_CID_IRIS_ABSOLUTE:
case V4L2_CID_FNUMBER_ABSOLUTE:
case V4L2_CID_VCM_TIMEING:
case V4L2_CID_VCM_TIMING:
case V4L2_CID_VCM_SLEW:
case V4L2_CID_3A_LOCK:
case V4L2_CID_TEST_PATTERN:
......
......@@ -1086,10 +1086,11 @@ static int atomisp_subdev_probe(struct atomisp_device *isp)
/* FIXME: should return -EPROBE_DEFER if not all subdevs were probed */
for (count = 0; count < SUBDEV_WAIT_TIMEOUT_MAX_COUNT; count++) {
int camera_count = 0;
for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) {
if (subdevs->type == RAW_CAMERA ||
subdevs->type == SOC_CAMERA)
camera_count ++;
camera_count++;
}
if (camera_count)
break;
......@@ -1565,6 +1566,7 @@ static int init_atomisp_wdts(struct atomisp_device *isp)
for (i = 0; i < isp->num_of_streams; i++) {
struct atomisp_sub_device *asd = &isp->asd[i];
if (!atomisp_hw_is_isp2401)
timer_setup(&asd->wdt, atomisp_wdt, 0);
else {
......
......@@ -210,7 +210,7 @@ ia_css_initialize_ynr_state(
/* Code generated by genparam/genstate.c:gen_state_init_table() */
void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(
void (*ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(
const struct ia_css_binary *binary) = {
ia_css_initialize_aa_state,
ia_css_initialize_cnr_state,
......
......@@ -272,7 +272,6 @@ ia_css_configure_output(
"ia_css_configure_output() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
......
......@@ -210,7 +210,7 @@ ia_css_initialize_ynr_state(
/* Code generated by genparam/genstate.c:gen_state_init_table() */
void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(
void (*ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(
const struct ia_css_binary *binary) = {
ia_css_initialize_aa_state,
ia_css_initialize_cnr_state,
......
......@@ -46,6 +46,7 @@ struct isys2401_dma_port_cfg_s {
u32 cropping;
u32 width;
};
/* end of DMA Port */
/************************************************
......
......@@ -171,7 +171,6 @@ enum TRACE_DUMP_FORMAT {
#define TRACE_ISP_DATA_SIZE (TRACE_ISP_SIZE - TRACE_ISP_HEADER_SIZE)
#define TRACE_ISP_MAX_POINTS (TRACE_ISP_DATA_SIZE / TRACE_ISP_ITEM_SIZE)
/* common majors */
/* SP0 */
#define MAJOR_MAIN 1
......
......@@ -20,7 +20,6 @@
#include "debug_private.h"
#endif /* __INLINE_DEBUG__ */
#define __INLINE_SP__
#include "sp.h"
......
......@@ -22,7 +22,6 @@
#define __INLINE_ISP__
#include "isp.h"
#include "assert_support.h"
STORAGE_CLASS_DEBUG_C bool is_debug_buffer_empty(void)
......
......@@ -161,5 +161,4 @@ static inline int strcpy_s(
return 0;
}
#endif /* __STRING_SUPPORT_H_INCLUDED__ */
......@@ -65,7 +65,7 @@ struct ia_css_state_memory_offsets {
#include "ia_css_binary.h" /* struct ia_css_binary */
/* Code generated by genparam/genstate.c:gen_state_init_table() */
extern void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(
extern void (*ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(
const struct ia_css_binary *binary);
#endif /* IA_CSS_INCLUDE_STATE */
......
......@@ -502,7 +502,7 @@ ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe,
*/
enum ia_css_err
ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe,
uint32_t fw_handle,
u32 fw_handle,
struct ia_css_isp_param_css_segments *css_seg,
struct ia_css_isp_param_isp_segments *isp_seg);
......
......@@ -306,7 +306,6 @@ struct ia_css_shading_info {
u32 bayer_scale_ver_ratio_in;
u32 bayer_scale_ver_ratio_out;
/** Vertical ratio of bayer scaling
between input height and output height, for the scaling
which should be done before shading correction.
......
......@@ -21,7 +21,7 @@
/* Advanced Noise Reduction (ANR) thresholds */
struct ia_css_isp_anr2_params {
VMEM_ARRAY(data, ANR_PARAM_SIZE *ISP_VEC_NELEMS);
VMEM_ARRAY(data, ANR_PARAM_SIZE * ISP_VEC_NELEMS);
};
#endif /* __IA_CSS_ANR2_PARAM_H */
......@@ -42,7 +42,7 @@ static const s32 div_lut_intercepts[BNLM_DIV_LUT_SIZE] = {
*/
static inline void
bnlm_lut_encode(struct bnlm_lut *lut, const int32_t *lut_thr,
const int32_t *lut_val, const uint32_t lut_size)
const s32 *lut_val, const uint32_t lut_size)
{
u32 blk, i;
const u32 block_size = 16;
......
......@@ -25,7 +25,7 @@ struct sh_css_isp_macc1_5_params {
};
struct sh_css_isp_macc1_5_vmem_params {
VMEM_ARRAY(data, IA_CSS_MACC_NUM_COEFS *ISP_NWAY);
VMEM_ARRAY(data, IA_CSS_MACC_NUM_COEFS * ISP_NWAY);
};
#endif /* __IA_CSS_MACC1_5_PARAM_H */
......@@ -76,12 +76,12 @@ struct sh_css_isp_sdis_vert_proj_tbl {
struct sh_css_isp_sdis_hori_coef_tbl {
VMEM_ARRAY(tbl[ISP_DVS_NUM_COEF_TYPES],
ISP_MAX_SDIS_HOR_COEF_NUM_VECS *ISP_NWAY);
ISP_MAX_SDIS_HOR_COEF_NUM_VECS * ISP_NWAY);
};
struct sh_css_isp_sdis_vert_coef_tbl {
VMEM_ARRAY(tbl[ISP_DVS_NUM_COEF_TYPES],
ISP_MAX_SDIS_VER_COEF_NUM_VECS *ISP_NWAY);
ISP_MAX_SDIS_VER_COEF_NUM_VECS * ISP_NWAY);
};
#endif /* defined(__ISP) || defined (MK_FIRMWARE) */
......
......@@ -106,6 +106,7 @@ static const hrt_address IRQ_BASE[N_IRQ_ID] = {
(hrt_address)0x000000000008C000ULL,
(hrt_address)0x0000000000090200ULL
};
/*
(hrt_address)0x0000000000000500ULL};
*/
......@@ -161,6 +162,7 @@ static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = {
static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = {
(hrt_address)0x0000000000080000ULL
};
/* (hrt_address)0x0000000000081000ULL, */ /* capture A */
/* (hrt_address)0x0000000000082000ULL, */ /* capture B */
/* (hrt_address)0x0000000000083000ULL, */ /* capture C */
......@@ -247,6 +249,7 @@ static const hrt_address IRQ_BASE[N_IRQ_ID] = {
(hrt_address)0x0008C000UL,
(hrt_address)0x00090200UL
};
/*
(hrt_address)0x00000500UL};
*/
......@@ -297,12 +300,14 @@ static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = {
(hrt_address)0x00030200UL,
(hrt_address)0x00030400UL
};
/* (hrt_address)0x00030600UL, */ /* memcpy() */
/* INPUT_SYSTEM */
static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = {
(hrt_address)0x00080000UL
};
/* (hrt_address)0x00081000UL, */ /* capture A */
/* (hrt_address)0x00082000UL, */ /* capture B */
/* (hrt_address)0x00083000UL, */ /* capture C */
......
......@@ -104,6 +104,7 @@ static const hrt_address IRQ_BASE[N_IRQ_ID] = {
0x000000000008C000ULL,
0x0000000000090200ULL
};
/*
0x0000000000000500ULL};
*/
......@@ -160,6 +161,7 @@ static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = {
static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = {
0x0000000000080000ULL
};
/* 0x0000000000081000ULL, */ /* capture A */
/* 0x0000000000082000ULL, */ /* capture B */
/* 0x0000000000083000ULL, */ /* capture C */
......@@ -287,6 +289,7 @@ static const hrt_address IRQ_BASE[N_IRQ_ID] = {
0x0008C000UL,
0x00090200UL
};
/*
0x00000500UL};
*/
......@@ -336,12 +339,14 @@ static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = {
0x00030200UL,
0x00030400UL
};
/* 0x00030600UL, */ /* memcpy() */
/* INPUT_SYSTEM */
static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = {
0x00080000UL
};
/* 0x00081000UL, */ /* capture A */
/* 0x00082000UL, */ /* capture B */
/* 0x00083000UL, */ /* capture C */
......
......@@ -29,7 +29,6 @@
/*#include "sp.h"*/ /* host2sp_enqueue_frame_data() */
#include "assert_support.h"
#include "platform_support.h" /* hrt_sleep() */
......
......@@ -281,8 +281,7 @@ enum ia_css_err ia_css_frame_allocate_contiguous(struct ia_css_frame **frame,
enum ia_css_err err = IA_CSS_SUCCESS;
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
"ia_css_frame_allocate_contiguous() "
"enter: width=%d, height=%d, format=%d, padded_width=%d, raw_bit_depth=%d\n",
"ia_css_frame_allocate_contiguous() enter: width=%d, height=%d, format=%d, padded_width=%d, raw_bit_depth=%d\n",
width, height, format, padded_width, raw_bit_depth);
err = frame_allocate_with_data(frame, width, height, format,
......@@ -802,9 +801,9 @@ static enum ia_css_err frame_allocate_buffer_data(struct ia_css_frame *frame)
IA_CSS_ENTER_LEAVE_PRIVATE("frame->data_bytes=%d\n", frame->data_bytes);
#endif
frame->data = hmm_alloc(frame->data_bytes,
HMM_BO_PRIVATE, 0, NULL,
frame->contiguous ?
ATOMISP_MAP_FLAG_CONTIGUOUS : 0);
HMM_BO_PRIVATE, 0, NULL,
frame->contiguous ?
ATOMISP_MAP_FLAG_CONTIGUOUS : 0);
if (frame->data == mmgr_NULL)
return IA_CSS_ERR_CANNOT_ALLOCATE_MEMORY;
......
......@@ -3688,6 +3688,7 @@ static enum ia_css_err create_host_video_pipeline(struct ia_css_pipe *pipe)
}
if (video_stage) {
int frm;
for (frm = 0; frm < NUM_TNR_FRAMES; frm++) {
video_stage->args.tnr_frames[frm] =
pipe->pipe_settings.video.tnr_frames[frm];
......@@ -6687,7 +6688,8 @@ static enum ia_css_err load_low_light_binaries(
return err;
}
static bool copy_on_sp(struct ia_css_pipe *pipe) {
static bool copy_on_sp(struct ia_css_pipe *pipe)
{
bool rval;
assert(pipe);
......@@ -7381,7 +7383,8 @@ unload_yuvpp_binaries(struct ia_css_pipe *pipe) {
return IA_CSS_SUCCESS;
}
static enum ia_css_err yuvpp_start(struct ia_css_pipe *pipe) {
static enum ia_css_err yuvpp_start(struct ia_css_pipe *pipe)
{
struct ia_css_binary *copy_binary;
enum ia_css_err err = IA_CSS_SUCCESS;
enum sh_css_pipe_config_override copy_ovrd;
......@@ -8408,7 +8411,8 @@ remove_firmware(struct ia_css_fw_info **l, struct ia_css_fw_info *firmware) {
return; /* removing single and multiple firmware is handled in acc_unload_extension() */
}
static enum ia_css_err upload_isp_code(struct ia_css_fw_info *firmware) {
static enum ia_css_err upload_isp_code(struct ia_css_fw_info *firmware)
{
ia_css_ptr binary;
if (!firmware) {
......@@ -8665,7 +8669,8 @@ enum ia_css_err ia_css_stream_capture(
return return_err;
}
void ia_css_stream_request_flash(struct ia_css_stream *stream) {
void ia_css_stream_request_flash(struct ia_css_stream *stream)
{
(void)stream;
assert(stream);
......@@ -8766,7 +8771,8 @@ sh_css_init_host_sp_control_vars(void) {
/*
* create the internal structures and fill in the configuration data
*/
void ia_css_pipe_config_defaults(struct ia_css_pipe_config *pipe_config) {
void ia_css_pipe_config_defaults(struct ia_css_pipe_config *pipe_config)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_pipe_config_defaults()\n");
*pipe_config = DEFAULT_PIPE_CONFIG;
}
......@@ -8788,7 +8794,8 @@ ia_css_pipe_extra_config_defaults(struct ia_css_pipe_extra_config
extra_config->enable_fractional_ds = false;
}
void ia_css_stream_config_defaults(struct ia_css_stream_config *stream_config) {
void ia_css_stream_config_defaults(struct ia_css_stream_config *stream_config)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_stream_config_defaults()\n");
assert(stream_config);
memset(stream_config, 0, sizeof(*stream_config));
......@@ -8842,6 +8849,7 @@ ia_css_pipe_create(const struct ia_css_pipe_config *config,
if (!pipe)
#else
}
if (!pipe)
{
IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS);
......@@ -9061,7 +9069,8 @@ ia_css_pipe_get_info(const struct ia_css_pipe *pipe,
return IA_CSS_SUCCESS;
}
bool ia_css_pipe_has_dvs_stats(struct ia_css_pipe_info *pipe_info) {
bool ia_css_pipe_has_dvs_stats(struct ia_css_pipe_info *pipe_info)
{
unsigned int i;
if (pipe_info) {
......@@ -9917,7 +9926,6 @@ ia_css_stream_get_info(const struct ia_css_stream *stream,
*/
enum ia_css_err
ia_css_stream_load(struct ia_css_stream *stream) {
if (!atomisp_hw_is_isp2401) {
int i;
enum ia_css_err err;
......@@ -10494,7 +10502,8 @@ ia_css_update_continuous_frames(struct ia_css_stream *stream) {
return IA_CSS_SUCCESS;
}
void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map) {
void ia_css_pipe_map_queue(struct ia_css_pipe *pipe, bool map)
{
unsigned int thread_id;
enum ia_css_pipe_id pipe_id;
unsigned int pipe_num;
......@@ -10757,7 +10766,7 @@ ia_css_pipe_get_qos_ext_state(struct ia_css_pipe *pipe, uint32_t fw_handle,
/* ISP2401 */
enum ia_css_err
ia_css_pipe_update_qos_ext_mapped_arg(struct ia_css_pipe *pipe,
uint32_t fw_handle,
u32 fw_handle,
struct ia_css_isp_param_css_segments *css_seg,
struct ia_css_isp_param_isp_segments *isp_seg) {
unsigned int HIVE_ADDR_sp_group;
......
......@@ -177,7 +177,6 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191]
#define SH_CSS_MORPH_TABLE_ELEMS_PER_DDR_WORD \
(HIVE_ISP_DDR_WORD_BYTES / SH_CSS_MORPH_TABLE_ELEM_BYTES)
#define ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR (SH_CSS_MAX_BQ_GRID_WIDTH + 1)
#define ISP2400_SH_CSS_MAX_SCTBL_HEIGHT_PER_COLOR (SH_CSS_MAX_BQ_GRID_HEIGHT + 1)
......@@ -275,7 +274,6 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191]
(ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + \
SH_CSS_SCTBL_CENTERING_MARGIN + SH_CSS_SCTBL_LAST_GRID_COUNT)
/* ISP2401: Legacy API: Number of horizontal grids per color in the shading table. */
#define _ISP_SCTBL_LEGACY_WIDTH_PER_COLOR(input_width, deci_factor_log2) \
(ISP_BQ_GRID_WIDTH(input_width, deci_factor_log2) + SH_CSS_SCTBL_LAST_GRID_COUNT)
......@@ -284,7 +282,6 @@ RGB[0,8191],coef[-8192,8191] -> RGB[0,8191]
#define _ISP_SCTBL_LEGACY_HEIGHT(input_height, deci_factor_log2) \
(ISP_BQ_GRID_HEIGHT(input_height, deci_factor_log2) + SH_CSS_SCTBL_LAST_GRID_COUNT)
/* *****************************************************************
* Statistics for 3A (Auto Focus, Auto White Balance, Auto Exposure)
* *****************************************************************/
......
......@@ -4249,12 +4249,16 @@ sh_css_params_write_to_ddr_internal(
{
unsigned int i;
ia_css_ptr *virt_addr_tetra_x[
IA_CSS_MORPH_TABLE_NUM_PLANES];
size_t *virt_size_tetra_x[
IA_CSS_MORPH_TABLE_NUM_PLANES];
ia_css_ptr *virt_addr_tetra_y[
IA_CSS_MORPH_TABLE_NUM_PLANES];
size_t *virt_size_tetra_y[
IA_CSS_MORPH_TABLE_NUM_PLANES];
virt_addr_tetra_x[0] = &ddr_map->tetra_r_x;
......@@ -4565,7 +4569,7 @@ free_ia_css_isp_parameter_set_info(
enum ia_css_err err = IA_CSS_SUCCESS;
struct ia_css_isp_parameter_set_info isp_params_info;
unsigned int i;
ia_css_ptr *addrs = (ia_css_ptr *) &isp_params_info.mem_map;
ia_css_ptr *addrs = (ia_css_ptr *)&isp_params_info.mem_map;
IA_CSS_ENTER_PRIVATE("ptr = %u", ptr);
......
......@@ -66,6 +66,7 @@ struct sh_css {
#endif
ia_css_ptr sp_bin_addr;
hrt_data page_table_base_index;
unsigned int
size_mem_words; /* \deprecated{Use ia_css_mipi_buffer_config instead.}*/
enum ia_css_irq_type irq_type;
......
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