Commit abd56b3c authored by Thor Thayer's avatar Thor Thayer Committed by Borislav Petkov

Documentation: dt: socfpga: Add Altera Arria10 OCRAM binding

Add the device tree bindings needed to support the Altera On-Chip
RAM ECC on the Arria10 chip.
Signed-off-by: default avatarThor Thayer <tthayer@opensource.altera.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1459450087-24792-5-git-send-email-tthayer@opensource.altera.comSigned-off-by: default avatarBorislav Petkov <bp@suse.de>
parent aa1f06dc
......@@ -71,6 +71,11 @@ Required Properties:
- compatible : Should be "altr,socfpga-a10-l2-ecc"
- reg : Address and size for ECC error interrupt clear registers.
On-Chip RAM ECC
Required Properties:
- compatible : Should be "altr,socfpga-a10-ocram-ecc"
- reg : Address and size for ECC block registers.
Example:
eccmgr: eccmgr@ffd06000 {
......@@ -86,4 +91,9 @@ Example:
compatible = "altr,socfpga-a10-l2-ecc";
reg = <0xffd06010 0x4>;
};
ocram-ecc@ff8c3000 {
compatible = "altr,socfpga-a10-ocram-ecc";
reg = <0xff8c3000 0x90>;
};
};
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