Commit acbcc0f0 authored by Emilio López's avatar Emilio López Committed by Maxime Ripard

ARM: dts: sunxi: unify APB1 clock

With the new factors infrastructure in place, we can unify apb1 and
apb1_mux as a single clock now.
Signed-off-by: default avatarEmilio López <emilio@elopez.com.ar>
[wens@csie.org: Change apb1 node label to "apb1"; reword commit title]
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent 93746e70
...@@ -174,19 +174,11 @@ apb0_gates: clk@01c20068 { ...@@ -174,19 +174,11 @@ apb0_gates: clk@01c20068 {
"apb0_ir1", "apb0_keypad"; "apb0_ir1", "apb0_keypad";
}; };
apb1_mux: apb1_mux@01c20058 { apb1: clk@01c20058 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-apb1-mux-clk";
reg = <0x01c20058 0x4>;
clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
clock-output-names = "apb1_mux";
};
apb1: apb1@01c20058 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "allwinner,sun4i-a10-apb1-clk"; compatible = "allwinner,sun4i-a10-apb1-clk";
reg = <0x01c20058 0x4>; reg = <0x01c20058 0x4>;
clocks = <&apb1_mux>; clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
clock-output-names = "apb1"; clock-output-names = "apb1";
}; };
......
...@@ -162,19 +162,11 @@ apb0_gates: clk@01c20068 { ...@@ -162,19 +162,11 @@ apb0_gates: clk@01c20068 {
"apb0_ir", "apb0_keypad"; "apb0_ir", "apb0_keypad";
}; };
apb1_mux: apb1_mux@01c20058 { apb1: clk@01c20058 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-apb1-mux-clk";
reg = <0x01c20058 0x4>;
clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
clock-output-names = "apb1_mux";
};
apb1: apb1@01c20058 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "allwinner,sun4i-a10-apb1-clk"; compatible = "allwinner,sun4i-a10-apb1-clk";
reg = <0x01c20058 0x4>; reg = <0x01c20058 0x4>;
clocks = <&apb1_mux>; clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
clock-output-names = "apb1"; clock-output-names = "apb1";
}; };
......
...@@ -161,19 +161,11 @@ apb0_gates: clk@01c20068 { ...@@ -161,19 +161,11 @@ apb0_gates: clk@01c20068 {
clock-output-names = "apb0_codec", "apb0_pio", "apb0_ir"; clock-output-names = "apb0_codec", "apb0_pio", "apb0_ir";
}; };
apb1_mux: apb1_mux@01c20058 { apb1: clk@01c20058 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-apb1-mux-clk";
reg = <0x01c20058 0x4>;
clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
clock-output-names = "apb1_mux";
};
apb1: apb1@01c20058 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "allwinner,sun4i-a10-apb1-clk"; compatible = "allwinner,sun4i-a10-apb1-clk";
reg = <0x01c20058 0x4>; reg = <0x01c20058 0x4>;
clocks = <&apb1_mux>; clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
clock-output-names = "apb1"; clock-output-names = "apb1";
}; };
......
...@@ -222,19 +222,11 @@ apb0_gates: clk@01c20068 { ...@@ -222,19 +222,11 @@ apb0_gates: clk@01c20068 {
"apb0_iis2", "apb0_keypad"; "apb0_iis2", "apb0_keypad";
}; };
apb1_mux: apb1_mux@01c20058 { apb1: clk@01c20058 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-apb1-mux-clk";
reg = <0x01c20058 0x4>;
clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
clock-output-names = "apb1_mux";
};
apb1: apb1@01c20058 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "allwinner,sun4i-a10-apb1-clk"; compatible = "allwinner,sun4i-a10-apb1-clk";
reg = <0x01c20058 0x4>; reg = <0x01c20058 0x4>;
clocks = <&apb1_mux>; clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
clock-output-names = "apb1"; clock-output-names = "apb1";
}; };
......
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