Commit ad4a38d2 authored by Sylvain Rochet's avatar Sylvain Rochet Committed by Nicolas Ferre

pm: at91: pm_slowclock: fix suspend/resume hang up in timeouts

Removed timeout on XTAL, PLL lock and Master Clock Ready, hang if
something went wrong instead of continuing in unknown condition. There
is not much we can do if a PLL lock never ends, we are running in SRAM
and we will not be able to connect back the sdram or ddram in order to
be able to fire up a message or just panic.

As a bonus, not decounting the timeout register in slow clock mode
reduce cumulated suspend time and resume time from ~17ms to ~15ms.
Signed-off-by: default avatarSylvain Rochet <sylvain.rochet@finsecur.com>
Acked-by: default avatarWenyou.Yang <wenyou.yang@atmel.com>
Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
parent c517d838
...@@ -25,11 +25,6 @@ ...@@ -25,11 +25,6 @@
*/ */
#undef SLOWDOWN_MASTER_CLOCK #undef SLOWDOWN_MASTER_CLOCK
#define MCKRDY_TIMEOUT 1000
#define MOSCRDY_TIMEOUT 1000
#define PLLALOCK_TIMEOUT 1000
#define PLLBLOCK_TIMEOUT 1000
pmc .req r0 pmc .req r0
sdramc .req r1 sdramc .req r1
ramc1 .req r2 ramc1 .req r2
...@@ -41,56 +36,36 @@ tmp2 .req r5 ...@@ -41,56 +36,36 @@ tmp2 .req r5
* Wait until master clock is ready (after switching master clock source) * Wait until master clock is ready (after switching master clock source)
*/ */
.macro wait_mckrdy .macro wait_mckrdy
mov tmp2, #MCKRDY_TIMEOUT 1: ldr tmp1, [pmc, #AT91_PMC_SR]
1: sub tmp2, tmp2, #1
cmp tmp2, #0
beq 2f
ldr tmp1, [pmc, #AT91_PMC_SR]
tst tmp1, #AT91_PMC_MCKRDY tst tmp1, #AT91_PMC_MCKRDY
beq 1b beq 1b
2:
.endm .endm
/* /*
* Wait until master oscillator has stabilized. * Wait until master oscillator has stabilized.
*/ */
.macro wait_moscrdy .macro wait_moscrdy
mov tmp2, #MOSCRDY_TIMEOUT 1: ldr tmp1, [pmc, #AT91_PMC_SR]
1: sub tmp2, tmp2, #1
cmp tmp2, #0
beq 2f
ldr tmp1, [pmc, #AT91_PMC_SR]
tst tmp1, #AT91_PMC_MOSCS tst tmp1, #AT91_PMC_MOSCS
beq 1b beq 1b
2:
.endm .endm
/* /*
* Wait until PLLA has locked. * Wait until PLLA has locked.
*/ */
.macro wait_pllalock .macro wait_pllalock
mov tmp2, #PLLALOCK_TIMEOUT 1: ldr tmp1, [pmc, #AT91_PMC_SR]
1: sub tmp2, tmp2, #1
cmp tmp2, #0
beq 2f
ldr tmp1, [pmc, #AT91_PMC_SR]
tst tmp1, #AT91_PMC_LOCKA tst tmp1, #AT91_PMC_LOCKA
beq 1b beq 1b
2:
.endm .endm
/* /*
* Wait until PLLB has locked. * Wait until PLLB has locked.
*/ */
.macro wait_pllblock .macro wait_pllblock
mov tmp2, #PLLBLOCK_TIMEOUT 1: ldr tmp1, [pmc, #AT91_PMC_SR]
1: sub tmp2, tmp2, #1
cmp tmp2, #0
beq 2f
ldr tmp1, [pmc, #AT91_PMC_SR]
tst tmp1, #AT91_PMC_LOCKB tst tmp1, #AT91_PMC_LOCKB
beq 1b beq 1b
2:
.endm .endm
.text .text
......
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