Commit ad8059cf authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Clean up the PNV bit banging vs. GMBUS clock gating w/a

Give a proper name for the GMBUS clock gating disable bit on PNV,
and rename intel_i2c_quirk_set() to pnv_gmbus_clock_gating() for
clarity.
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171208213739.16388-3-ville.syrjala@linux.intel.comReviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 54c105d6
...@@ -3278,6 +3278,7 @@ enum i915_power_well_id { ...@@ -3278,6 +3278,7 @@ enum i915_power_well_id {
# define AUDUNIT_CLOCK_GATE_DISABLE (1 << 26) /* 965 */ # define AUDUNIT_CLOCK_GATE_DISABLE (1 << 26) /* 965 */
# define DPUNIT_A_CLOCK_GATE_DISABLE (1 << 25) /* 965 */ # define DPUNIT_A_CLOCK_GATE_DISABLE (1 << 25) /* 965 */
# define DPCUNIT_CLOCK_GATE_DISABLE (1 << 24) /* 965 */ # define DPCUNIT_CLOCK_GATE_DISABLE (1 << 24) /* 965 */
# define PNV_GMBUSUNIT_CLOCK_GATE_DISABLE (1 << 24) /* pnv */
# define TVRUNIT_CLOCK_GATE_DISABLE (1 << 23) /* 915-945 */ # define TVRUNIT_CLOCK_GATE_DISABLE (1 << 23) /* 915-945 */
# define TVCUNIT_CLOCK_GATE_DISABLE (1 << 22) /* 915-945 */ # define TVCUNIT_CLOCK_GATE_DISABLE (1 << 22) /* 915-945 */
# define TVFUNIT_CLOCK_GATE_DISABLE (1 << 21) /* 915-945 */ # define TVFUNIT_CLOCK_GATE_DISABLE (1 << 21) /* 915-945 */
......
...@@ -128,19 +128,17 @@ intel_i2c_reset(struct drm_i915_private *dev_priv) ...@@ -128,19 +128,17 @@ intel_i2c_reset(struct drm_i915_private *dev_priv)
I915_WRITE(GMBUS4, 0); I915_WRITE(GMBUS4, 0);
} }
static void intel_i2c_quirk_set(struct drm_i915_private *dev_priv, bool enable) static void pnv_gmbus_clock_gating(struct drm_i915_private *dev_priv,
bool enable)
{ {
u32 val; u32 val;
/* When using bit bashing for I2C, this bit needs to be set to 1 */ /* When using bit bashing for I2C, this bit needs to be set to 1 */
if (!IS_PINEVIEW(dev_priv))
return;
val = I915_READ(DSPCLK_GATE_D); val = I915_READ(DSPCLK_GATE_D);
if (enable) if (!enable)
val |= DPCUNIT_CLOCK_GATE_DISABLE; val |= PNV_GMBUSUNIT_CLOCK_GATE_DISABLE;
else else
val &= ~DPCUNIT_CLOCK_GATE_DISABLE; val &= ~PNV_GMBUSUNIT_CLOCK_GATE_DISABLE;
I915_WRITE(DSPCLK_GATE_D, val); I915_WRITE(DSPCLK_GATE_D, val);
} }
...@@ -221,7 +219,10 @@ intel_gpio_pre_xfer(struct i2c_adapter *adapter) ...@@ -221,7 +219,10 @@ intel_gpio_pre_xfer(struct i2c_adapter *adapter)
struct drm_i915_private *dev_priv = bus->dev_priv; struct drm_i915_private *dev_priv = bus->dev_priv;
intel_i2c_reset(dev_priv); intel_i2c_reset(dev_priv);
intel_i2c_quirk_set(dev_priv, true);
if (IS_PINEVIEW(dev_priv))
pnv_gmbus_clock_gating(dev_priv, false);
set_data(bus, 1); set_data(bus, 1);
set_clock(bus, 1); set_clock(bus, 1);
udelay(I2C_RISEFALL_TIME); udelay(I2C_RISEFALL_TIME);
...@@ -238,7 +239,9 @@ intel_gpio_post_xfer(struct i2c_adapter *adapter) ...@@ -238,7 +239,9 @@ intel_gpio_post_xfer(struct i2c_adapter *adapter)
set_data(bus, 1); set_data(bus, 1);
set_clock(bus, 1); set_clock(bus, 1);
intel_i2c_quirk_set(dev_priv, false);
if (IS_PINEVIEW(dev_priv))
pnv_gmbus_clock_gating(dev_priv, true);
} }
static void static void
......
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