Commit aebd3bd5 authored by Bibo Mao's avatar Bibo Mao Committed by Huacai Chen

LoongArch: KVM: Set reserved bits as zero in CPUCFG

Supported CPUCFG information comes from function _kvm_get_cpucfg_mask().
A bit should be zero if it is reserved by HW or if it is not supported
by KVM.

Also LoongArch software page table walk feature defined in CPUCFG2_LSPW
is supported by KVM, it should be enabled by default.
Signed-off-by: default avatarBibo Mao <maobibo@loongson.cn>
Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
parent 90d35da6
...@@ -304,11 +304,18 @@ static int _kvm_get_cpucfg_mask(int id, u64 *v) ...@@ -304,11 +304,18 @@ static int _kvm_get_cpucfg_mask(int id, u64 *v)
return -EINVAL; return -EINVAL;
switch (id) { switch (id) {
case 2: case LOONGARCH_CPUCFG0:
*v = GENMASK(31, 0);
return 0;
case LOONGARCH_CPUCFG1:
/* CPUCFG1_MSGINT is not supported by KVM */
*v = GENMASK(25, 0);
return 0;
case LOONGARCH_CPUCFG2:
/* CPUCFG2 features unconditionally supported by KVM */ /* CPUCFG2 features unconditionally supported by KVM */
*v = CPUCFG2_FP | CPUCFG2_FPSP | CPUCFG2_FPDP | *v = CPUCFG2_FP | CPUCFG2_FPSP | CPUCFG2_FPDP |
CPUCFG2_FPVERS | CPUCFG2_LLFTP | CPUCFG2_LLFTPREV | CPUCFG2_FPVERS | CPUCFG2_LLFTP | CPUCFG2_LLFTPREV |
CPUCFG2_LAM; CPUCFG2_LSPW | CPUCFG2_LAM;
/* /*
* For the ISA extensions listed below, if one is supported * For the ISA extensions listed below, if one is supported
* by the host, then it is also supported by KVM. * by the host, then it is also supported by KVM.
...@@ -318,14 +325,26 @@ static int _kvm_get_cpucfg_mask(int id, u64 *v) ...@@ -318,14 +325,26 @@ static int _kvm_get_cpucfg_mask(int id, u64 *v)
if (cpu_has_lasx) if (cpu_has_lasx)
*v |= CPUCFG2_LASX; *v |= CPUCFG2_LASX;
return 0;
case LOONGARCH_CPUCFG3:
*v = GENMASK(16, 0);
return 0;
case LOONGARCH_CPUCFG4:
case LOONGARCH_CPUCFG5:
*v = GENMASK(31, 0);
return 0;
case LOONGARCH_CPUCFG16:
*v = GENMASK(16, 0);
return 0;
case LOONGARCH_CPUCFG17 ... LOONGARCH_CPUCFG20:
*v = GENMASK(30, 0);
return 0; return 0;
default: default:
/* /*
* No restrictions on other valid CPUCFG IDs' values, but * CPUCFG bits should be zero if reserved by HW or not
* CPUCFG data is limited to 32 bits as the LoongArch ISA * supported by KVM.
* manual says (Volume 1, Section 2.2.10.5 "CPUCFG").
*/ */
*v = U32_MAX; *v = 0;
return 0; return 0;
} }
} }
...@@ -344,7 +363,7 @@ static int kvm_check_cpucfg(int id, u64 val) ...@@ -344,7 +363,7 @@ static int kvm_check_cpucfg(int id, u64 val)
return -EINVAL; return -EINVAL;
switch (id) { switch (id) {
case 2: case LOONGARCH_CPUCFG2:
if (!(val & CPUCFG2_LLFTP)) if (!(val & CPUCFG2_LLFTP))
/* Guests must have a constant timer */ /* Guests must have a constant timer */
return -EINVAL; return -EINVAL;
......
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