Commit af096046 authored by Jeff Garzik's avatar Jeff Garzik Committed by David S. Miller

[netdrvr] skfp: remove a bunch of dead code

The driver has not compiled in anything except PCI support for many
years (see drivers/net/skfp/Makefile).  This driver is also unmaintained
for many years, so arguments for keeping the cross-OS, cross-bus (ISA,
EISA, MCA) code do not exist.
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent 7856a541
This diff is collapsed.
......@@ -15,11 +15,7 @@
#ifndef _MBUF_
#define _MBUF_
#ifndef PCI
#define M_SIZE 4550
#else
#define M_SIZE 4504
#endif
#ifndef MAX_MBUF
#define MAX_MBUF 4
......
This diff is collapsed.
......@@ -22,32 +22,6 @@
*/
#define ERR_FLAGS (FS_MSRABT | FS_SEAC2 | FS_SFRMERR | FS_SFRMTY1)
#ifdef ISA
#define DMA_BUSY_CHECK CSRA
#define IMASK_FAST (IS_PLINT1 | IS_PLINT2 | IS_TIMINT)
#define HRQR (RQAA+(RQ_RRQ<<1))
#define HRQW (RQAA+(RQ_WA2<<1))
#define HRQA0 (RQAA+(RQ_WA0<<1))
#define HRQSQ (RQAA+(RQ_WSQ<<1))
#endif
#ifdef EISA
#define DMA_BUSY_CHECK CSRA
#define DMA_HIGH_WORD 0x0400
#define DMA_MASK_M 0x0a
#define DMA_MODE_M 0x0b
#define DMA_BYTE_PTR_M 0x0c
#define DMA_MASK_S 0x0d4
#define DMA_MODE_S 0x0d6
#define DMA_BYTE_PTR_S 0x0d8
#define IMASK_FAST (IS_PLINT1 | IS_PLINT2 | IS_TIMINT | IS_TC)
#endif /* EISA */
#ifdef MCA
#define IMASK_FAST (IS_PLINT1 | IS_PLINT2 | IS_TIMINT | IS_TOKEN | \
IS_CHCK_L | IS_BUSERR)
#endif
#ifdef PCI
#define IMASK_FAST (IS_PLINT1 | IS_PLINT2 | IS_TIMINT | IS_TOKEN | \
IS_MINTR2 | IS_MINTR3 | IS_R1_P | \
......
......@@ -53,11 +53,6 @@ struct s_oem_ids {
u_char oi_sub_id[4] ; /* sub id bytes, representation as */
/* defined by hardware, */
#endif
#ifdef ISA
u_char oi_logo_len ; /* the length of the adapter logo */
u_char oi_logo[6] ; /* the adapter logo */
u_char oi_reserved1 ;
#endif /* ISA */
} ;
#endif /* MULT_OEM */
......@@ -70,43 +65,17 @@ struct s_smt_hw {
short dma ; /* DMA channel */
short irq ; /* IRQ level */
short eprom ; /* FLASH prom */
#ifndef PCI
short DmaWriteExtraBytes ; /* add bytes for DMA write */
#endif
#ifndef SYNC
u_short n_a_send ; /* pending send requests */
#endif
#if (defined(EISA) || defined(MCA) || defined(PCI))
#if defined(PCI)
short slot ; /* slot number */
short max_slots ; /* maximum number of slots */
#endif
#if (defined(PCI) || defined(MCA))
short wdog_used ; /* TRUE if the watch dog is used */
#endif
#ifdef MCA
short slot_32 ; /* 32bit slot (1) or 16bit slot (0) */
short rev ; /* Board revision (FMx_REV). */
short VFullRead ; /* V_full value for DMA read */
short VFullWrite ; /* V_full value for DMA write */
#endif
#ifdef EISA
short led ; /* LED for FE card */
short dma_rmode ; /* read mode */
short dma_wmode ; /* write mode */
short dma_emode ; /* extend mode */
/* DMA controller channel dependent io addresses */
u_short dma_base_word_count ;
u_short dma_base_address ;
u_short dma_base_address_page ;
#endif
#ifdef PCI
u_short pci_handle ; /* handle to access the BIOS func */
u_long is_imask ; /* int maske for the int source reg */
......
......@@ -77,25 +77,10 @@ void hwt_start(struct s_smc *smc, u_long time)
*/
if (!cnt)
cnt++ ;
#ifndef PCI
/*
* 6.25MHz -> CLK0 : T0 (cnt0 = 16us) -> OUT0
* OUT0 -> CLK1 : T1 (cnt1) OUT1 -> ISRA(IS_TIMINT)
*/
OUT_82c54_TIMER(3,1<<6 | 3<<4 | 0<<1) ; /* counter 1, mode 0 */
OUT_82c54_TIMER(1,cnt & 0xff) ; /* LSB */
OUT_82c54_TIMER(1,(cnt>>8) & 0xff) ; /* MSB */
/*
* start timer by switching counter 0 to mode 3
* T0 resolution 16 us (CLK0=0.16us)
*/
OUT_82c54_TIMER(3,0<<6 | 3<<4 | 3<<1) ; /* counter 0, mode 3 */
OUT_82c54_TIMER(0,100) ; /* LSB */
OUT_82c54_TIMER(0,0) ; /* MSB */
#else /* PCI */
outpd(ADDR(B2_TI_INI), (u_long) cnt * 200) ; /* Load timer value. */
outpw(ADDR(B2_TI_CRTL), TIM_START) ; /* Start timer. */
#endif /* PCI */
smc->hw.timer_activ = TRUE ;
}
......@@ -115,15 +100,8 @@ void hwt_start(struct s_smc *smc, u_long time)
************************/
void hwt_stop(struct s_smc *smc)
{
#ifndef PCI
/* stop counter 0 by switching to mode 0 */
OUT_82c54_TIMER(3,0<<6 | 3<<4 | 0<<1) ; /* counter 0, mode 0 */
OUT_82c54_TIMER(0,0) ; /* LSB */
OUT_82c54_TIMER(0,0) ; /* MSB */
#else /* PCI */
outpw(ADDR(B2_TI_CRTL), TIM_STOP) ;
outpw(ADDR(B2_TI_CRTL), TIM_CL_IRQ) ;
#endif /* PCI */
smc->hw.timer_activ = FALSE ;
}
......@@ -168,11 +146,6 @@ void hwt_init(struct s_smc *smc)
void hwt_restart(struct s_smc *smc)
{
hwt_stop(smc) ;
#ifndef PCI
OUT_82c54_TIMER(3,1<<6 | 3<<4 | 0<<1) ; /* counter 1, mode 0 */
OUT_82c54_TIMER(1,1 ) ; /* LSB */
OUT_82c54_TIMER(1,0 ) ; /* MSB */
#endif
}
/************************
......@@ -191,21 +164,12 @@ void hwt_restart(struct s_smc *smc)
u_long hwt_read(struct s_smc *smc)
{
u_short tr ;
#ifndef PCI
u_short is ;
#else
u_long is ;
#endif
if (smc->hw.timer_activ) {
hwt_stop(smc) ;
#ifndef PCI
OUT_82c54_TIMER(3,1<<6) ; /* latch command */
tr = IN_82c54_TIMER(1) & 0xff ;
tr += (IN_82c54_TIMER(1) & 0xff)<<8 ;
#else /* PCI */
tr = (u_short)((inpd(ADDR(B2_TI_VAL))/200) & 0xffff) ;
#endif /* PCI */
is = GET_ISR() ;
/* Check if timer expired (or wraparound). */
if ((tr > smc->hw.t_start) || (is & IS_TIMINT)) {
......
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