Commit af16b005 authored by Rajendra Nayak's avatar Rajendra Nayak Committed by Bjorn Andersson

arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts

Add base dtsi and QCP board (Qualcomm Compute Platform) dts file for
X1E80100 SoC, describing the CPUs, GCC and RPMHCC clock controllers,
geni UART, interrupt controller, TLMM, reserved memory, interconnects,
SMMU and LLCC nodes.
Co-developed-by: default avatarAbel Vesa <abel.vesa@linaro.org>
Signed-off-by: default avatarAbel Vesa <abel.vesa@linaro.org>
Signed-off-by: default avatarRajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: default avatarSibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: default avatarSibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231205062403.14848-4-quic_sibis@quicinc.comSigned-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 7a85cecf
......@@ -237,3 +237,4 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8550-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8550-qrd.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8650-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8650-qrd.dtb
dtb-$(CONFIG_ARCH_QCOM) += x1e80100-qcp.dtb
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